aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/platforms/86xx
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2007-08-17 00:55:55 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-08-17 14:22:16 -0400
commitb66510cb9992d204f216049e9c01d432c7635f6c (patch)
tree4b00de7786b1ae5aeab06692fe2f67e1d8667fe7 /arch/powerpc/platforms/86xx
parentada3ea6fcde45abc55e2af0e564455fd7f943a79 (diff)
[POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boards
The interrupt routing in the device trees for the ULI M1575 was inproperly using the interrupt line field as pci function. Fixed up the device tree's to actual conform for to specification and changed the interrupt mapping code so it just uses a static mapping setup as follows: PIRQA - IRQ9 PIRQB - IRQ10 PIRQC - IRQ11 PIRQD - IRQ12 USB 1.1 OCHI (1c.0) - IRQ12 USB 1.1 OCHI (1c.1) - IRQ9 USB 1.1 OCHI (1c.2) - IRQ10 USB 1.1 ECHI (1c.3) - IRQ11 LAN (1b.0) - IRQ6 AC97 (1d.0) - IRQ6 Modem (1d.1) - IRQ6 HD Audio (1d.2) - IRQ6 SATA (1f.1) - IRQ5 SMB (1e.1) - IRQ7 PMU (1e.2) - IRQ7 PATA (1f.0) - IRQ14/15 Took the oppurtunity to refactor the code into a single file so we don't have to duplicate these fixes on the two current boards in the tree and several forth coming boards that will also need the code. Fixed RTC support that requires a dummy memory read on the P2P bridge to unlock the RTC and setup the default of the RTC alarm registers to match with a basic x86 style CMOS RTC. Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure the PCI IO space has been setup properly before we start poking ISA registers at random locations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/86xx')
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig1
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c224
2 files changed, 17 insertions, 208 deletions
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 343b76d0d793..685b2fbbbe00 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -7,6 +7,7 @@ config MPC8641_HPCN
7 bool "Freescale MPC8641 HPCN" 7 bool "Freescale MPC8641 HPCN"
8 select PPC_I8259 8 select PPC_I8259
9 select DEFAULT_UIMAGE 9 select DEFAULT_UIMAGE
10 select FSL_ULI1575
10 help 11 help
11 This option enables support for the MPC8641 HPCN board. 12 This option enables support for the MPC8641 HPCN board.
12 13
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index e9eaa0749ae6..56b27caf7a27 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -107,220 +107,25 @@ mpc86xx_hpcn_init_irq(void)
107} 107}
108 108
109#ifdef CONFIG_PCI 109#ifdef CONFIG_PCI
110extern int uses_fsl_uli_m1575;
111extern int uli_exclude_device(struct pci_controller *hose,
112 u_char bus, u_char devfn);
110 113
111enum pirq{PIRQA = 8, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH}; 114static int mpc86xx_exclude_device(struct pci_controller *hose,
112const unsigned char uli1575_irq_route_table[16] = { 115 u_char bus, u_char devfn)
113 0, /* 0: Reserved */
114 0x8, /* 1: 0b1000 */
115 0, /* 2: Reserved */
116 0x2, /* 3: 0b0010 */
117 0x4, /* 4: 0b0100 */
118 0x5, /* 5: 0b0101 */
119 0x7, /* 6: 0b0111 */
120 0x6, /* 7: 0b0110 */
121 0, /* 8: Reserved */
122 0x1, /* 9: 0b0001 */
123 0x3, /* 10: 0b0011 */
124 0x9, /* 11: 0b1001 */
125 0xb, /* 12: 0b1011 */
126 0, /* 13: Reserved */
127 0xd, /* 14, 0b1101 */
128 0xf, /* 15, 0b1111 */
129};
130
131static int __devinit
132get_pci_irq_from_of(struct pci_controller *hose, int slot, int pin)
133{
134 struct of_irq oirq;
135 u32 laddr[3];
136 struct device_node *hosenode = hose ? hose->arch_data : NULL;
137
138 if (!hosenode) return -EINVAL;
139
140 laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(slot, 0) << 8);
141 laddr[1] = laddr[2] = 0;
142 of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
143 DBG("mpc86xx_hpcn: pci irq addr %x, slot %d, pin %d, irq %d\n",
144 laddr[0], slot, pin, oirq.specifier[0]);
145 return oirq.specifier[0];
146}
147
148static void __devinit quirk_uli1575(struct pci_dev *dev)
149{
150 unsigned short temp;
151 struct pci_controller *hose = pci_bus_to_host(dev->bus);
152 unsigned char irq2pin[16], c;
153 unsigned long pirq_map_word = 0;
154 u32 irq;
155 int i;
156
157 /*
158 * ULI1575 interrupts route setup
159 */
160 memset(irq2pin, 0, 16); /* Initialize default value 0 */
161
162 /*
163 * PIRQA -> PIRQD mapping read from OF-tree
164 *
165 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
166 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
167 */
168 for (i = 0; i < 4; i++){
169 irq = get_pci_irq_from_of(hose, 17, i + 1);
170 if (irq > 0 && irq < 16)
171 irq2pin[irq] = PIRQA + i;
172 else
173 printk(KERN_WARNING "ULI1575 device"
174 "(slot %d, pin %d) irq %d is invalid.\n",
175 17, i, irq);
176 }
177
178 /*
179 * PIRQE -> PIRQF mapping set manually
180 *
181 * IRQ pin IRQ#
182 * PIRQE ---- 9
183 * PIRQF ---- 10
184 * PIRQG ---- 11
185 * PIRQH ---- 12
186 */
187 for (i = 0; i < 4; i++) irq2pin[i + 9] = PIRQE + i;
188
189 /* Set IRQ-PIRQ Mapping to ULI1575 */
190 for (i = 0; i < 16; i++)
191 if (irq2pin[i])
192 pirq_map_word |= (uli1575_irq_route_table[i] & 0xf)
193 << ((irq2pin[i] - PIRQA) * 4);
194
195 /* ULI1575 IRQ mapping conf register default value is 0xb9317542 */
196 DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n",
197 pirq_map_word);
198 pci_write_config_dword(dev, 0x48, pirq_map_word);
199
200#define ULI1575_SET_DEV_IRQ(slot, pin, reg) \
201 do { \
202 int irq; \
203 irq = get_pci_irq_from_of(hose, slot, pin); \
204 if (irq > 0 && irq < 16) \
205 pci_write_config_byte(dev, reg, irq2pin[irq]); \
206 else \
207 printk(KERN_WARNING "ULI1575 device" \
208 "(slot %d, pin %d) irq %d is invalid.\n", \
209 slot, pin, irq); \
210 } while(0)
211
212 /* USB 1.1 OHCI controller 1, slot 28, pin 1 */
213 ULI1575_SET_DEV_IRQ(28, 1, 0x86);
214
215 /* USB 1.1 OHCI controller 2, slot 28, pin 2 */
216 ULI1575_SET_DEV_IRQ(28, 2, 0x87);
217
218 /* USB 1.1 OHCI controller 3, slot 28, pin 3 */
219 ULI1575_SET_DEV_IRQ(28, 3, 0x88);
220
221 /* USB 2.0 controller, slot 28, pin 4 */
222 irq = get_pci_irq_from_of(hose, 28, 4);
223 if (irq >= 0 && irq <=15)
224 pci_write_config_dword(dev, 0x74, uli1575_irq_route_table[irq]);
225
226 /* Audio controller, slot 29, pin 1 */
227 ULI1575_SET_DEV_IRQ(29, 1, 0x8a);
228
229 /* Modem controller, slot 29, pin 2 */
230 ULI1575_SET_DEV_IRQ(29, 2, 0x8b);
231
232 /* HD audio controller, slot 29, pin 3 */
233 ULI1575_SET_DEV_IRQ(29, 3, 0x8c);
234
235 /* SMB interrupt: slot 30, pin 1 */
236 ULI1575_SET_DEV_IRQ(30, 1, 0x8e);
237
238 /* PMU ACPI SCI interrupt: slot 30, pin 2 */
239 ULI1575_SET_DEV_IRQ(30, 2, 0x8f);
240
241 /* Serial ATA interrupt: slot 31, pin 1 */
242 ULI1575_SET_DEV_IRQ(31, 1, 0x8d);
243
244 /* Primary PATA IDE IRQ: 14
245 * Secondary PATA IDE IRQ: 15
246 */
247 pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]);
248 pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]);
249
250 /* Set IRQ14 and IRQ15 to legacy IRQs */
251 pci_read_config_word(dev, 0x46, &temp);
252 temp |= 0xc000;
253 pci_write_config_word(dev, 0x46, temp);
254
255 /* Set i8259 interrupt trigger
256 * IRQ 3: Level
257 * IRQ 4: Level
258 * IRQ 5: Level
259 * IRQ 6: Level
260 * IRQ 7: Level
261 * IRQ 9: Level
262 * IRQ 10: Level
263 * IRQ 11: Level
264 * IRQ 12: Level
265 * IRQ 14: Edge
266 * IRQ 15: Edge
267 */
268 outb(0xfa, 0x4d0);
269 outb(0x1e, 0x4d1);
270
271#undef ULI1575_SET_DEV_IRQ
272
273 /* Disable the HD interface and enable the AC97 interface. */
274 pci_read_config_byte(dev, 0xb8, &c);
275 c &= 0x7f;
276 pci_write_config_byte(dev, 0xb8, c);
277}
278
279static void __devinit quirk_uli5288(struct pci_dev *dev)
280{ 116{
281 unsigned char c; 117 struct device_node* node;
118 struct resource rsrc;
282 119
283 pci_read_config_byte(dev,0x83,&c); 120 node = (struct device_node *)hose->arch_data;
284 c |= 0x80; 121 of_address_to_resource(node, 0, &rsrc);
285 pci_write_config_byte(dev, 0x83, c);
286 122
287 pci_write_config_byte(dev, 0x09, 0x01); 123 if ((rsrc.start & 0xfffff) == 0x8000) {
288 pci_write_config_byte(dev, 0x0a, 0x06); 124 return uli_exclude_device(hose, bus, devfn);
289 125 }
290 pci_read_config_byte(dev,0x83,&c);
291 c &= 0x7f;
292 pci_write_config_byte(dev, 0x83, c);
293
294 pci_read_config_byte(dev,0x84,&c);
295 c |= 0x01;
296 pci_write_config_byte(dev, 0x84, c);
297}
298
299static void __devinit quirk_uli5229(struct pci_dev *dev)
300{
301 unsigned short temp;
302 pci_write_config_word(dev, 0x04, 0x0405);
303 dev->class &= ~0x5;
304 pci_read_config_word(dev, 0x4a, &temp);
305 temp |= 0x1000;
306 pci_write_config_word(dev, 0x4a, temp);
307}
308 126
309static void __devinit early_uli5249(struct pci_dev *dev) 127 return PCIBIOS_SUCCESSFUL;
310{
311 unsigned char temp;
312 pci_write_config_word(dev, 0x04, 0x0007);
313 pci_read_config_byte(dev, 0x7c, &temp);
314 pci_write_config_byte(dev, 0x7c, 0x80);
315 pci_write_config_byte(dev, 0x09, 0x01);
316 pci_write_config_byte(dev, 0x7c, temp);
317 dev->class |= 0x1;
318} 128}
319
320DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
321DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
322DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
323DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
324#endif /* CONFIG_PCI */ 129#endif /* CONFIG_PCI */
325 130
326 131
@@ -353,6 +158,9 @@ mpc86xx_hpcn_setup_arch(void)
353 else 158 else
354 fsl_add_bridge(np, 0); 159 fsl_add_bridge(np, 0);
355 } 160 }
161 uses_fsl_uli_m1575 = 1;
162 ppc_md.pci_exclude_device = mpc86xx_exclude_device;
163
356#endif 164#endif
357 165
358 printk("MPC86xx HPCN board from Freescale Semiconductor\n"); 166 printk("MPC86xx HPCN board from Freescale Semiconductor\n");