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authorLinus Torvalds <torvalds@g5.osdl.org>2006-08-31 00:44:06 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-08-31 00:44:06 -0400
commit4c15343167b5febe7bb0ba96aad5bef42ae94d3b (patch)
treee70f835cc57a6e4b7e18bcb1908217a95a389ba7 /arch/powerpc/platforms/86xx
parenteb36c2884a1a2190791afe65fd833b2d3cd4b999 (diff)
parentd0027bf09f09d95a23b8f476ba8cea28f2576781 (diff)
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Fix return value from memcpy [POWERPC] iseries: Define insw et al. so libata/ide will compile [POWERPC] Fix irq enable/disable in smp_generic_take_timebase [POWERPC] Fix problem with time not advancing on 32-bit platforms [POWERPC] Restore copyright notice in arch/powerpc/kernel/fpu.S [POWERPC] Fix up ibm_architecture_vec definition [POWERPC] Make OF irq map code detect more error cases [POWERPC] Support for "weird" MPICs and fixup mpc7448_hpc2 [POWERPC] Fix MPIC sense codes in documentation [POWERPC] Fix performance regression in IRQ radix tree locking [POWERPC] Add mpc7448hpc2 device tree source file [POWERPC] Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts [POWERPC] modify mpc83xx platforms to use new IRQ layer [POWERPC] Adapt ipic driver to new host_ops interface, add set_irq_type to set IRQ sense [POWERPC] back up old school ipic.[hc] to arch/ppc [POWERPC] Use mpc8641hpcn PIC base address from dev tree. [POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too. [POWERPC] Fix powerpc 44x_mmu build [POWERPC] Remove flush_dcache_all export
Diffstat (limited to 'arch/powerpc/platforms/86xx')
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c26
-rw-r--r--arch/powerpc/platforms/86xx/pci.c3
2 files changed, 17 insertions, 12 deletions
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 146da3001c67..0b1b52168bb7 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -52,6 +52,7 @@ unsigned long pci_dram_offset = 0;
52#endif 52#endif
53 53
54 54
55#ifdef CONFIG_PCI
55static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc, 56static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
56 struct pt_regs *regs) 57 struct pt_regs *regs)
57{ 58{
@@ -60,40 +61,43 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
60 generic_handle_irq(cascade_irq, regs); 61 generic_handle_irq(cascade_irq, regs);
61 desc->chip->eoi(irq); 62 desc->chip->eoi(irq);
62} 63}
64#endif /* CONFIG_PCI */
63 65
64void __init 66void __init
65mpc86xx_hpcn_init_irq(void) 67mpc86xx_hpcn_init_irq(void)
66{ 68{
67 struct mpic *mpic1; 69 struct mpic *mpic1;
68 struct device_node *np, *cascade_node = NULL; 70 struct device_node *np;
71 struct resource res;
72#ifdef CONFIG_PCI
73 struct device_node *cascade_node = NULL;
69 int cascade_irq; 74 int cascade_irq;
70 phys_addr_t openpic_paddr; 75#endif
71 76
77 /* Determine PIC address. */
72 np = of_find_node_by_type(NULL, "open-pic"); 78 np = of_find_node_by_type(NULL, "open-pic");
73 if (np == NULL) 79 if (np == NULL)
74 return; 80 return;
75 81 of_address_to_resource(np, 0, &res);
76 /* Determine the Physical Address of the OpenPIC regs */
77 openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET;
78 82
79 /* Alloc mpic structure and per isu has 16 INT entries. */ 83 /* Alloc mpic structure and per isu has 16 INT entries. */
80 mpic1 = mpic_alloc(np, openpic_paddr, 84 mpic1 = mpic_alloc(np, res.start,
81 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 85 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
82 16, NR_IRQS - 4, 86 16, NR_IRQS - 4,
83 " MPIC "); 87 " MPIC ");
84 BUG_ON(mpic1 == NULL); 88 BUG_ON(mpic1 == NULL);
85 89
86 mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000); 90 mpic_assign_isu(mpic1, 0, res.start + 0x10000);
87 91
88 /* 48 Internal Interrupts */ 92 /* 48 Internal Interrupts */
89 mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200); 93 mpic_assign_isu(mpic1, 1, res.start + 0x10200);
90 mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400); 94 mpic_assign_isu(mpic1, 2, res.start + 0x10400);
91 mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600); 95 mpic_assign_isu(mpic1, 3, res.start + 0x10600);
92 96
93 /* 16 External interrupts 97 /* 16 External interrupts
94 * Moving them from [0 - 15] to [64 - 79] 98 * Moving them from [0 - 15] to [64 - 79]
95 */ 99 */
96 mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000); 100 mpic_assign_isu(mpic1, 4, res.start + 0x10000);
97 101
98 mpic_init(mpic1); 102 mpic_init(mpic1);
99 103
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index bc5139043112..a8c8f0a44055 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -188,7 +188,8 @@ int __init add_bridge(struct device_node *dev)
188 188
189 printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. " 189 printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. "
190 "Firmware bus number: %d->%d\n", 190 "Firmware bus number: %d->%d\n",
191 rsrc.start, hose->first_busno, hose->last_busno); 191 (unsigned long) rsrc.start,
192 hose->first_busno, hose->last_busno);
192 193
193 DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", 194 DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
194 hose, hose->cfg_addr, hose->cfg_data); 195 hose, hose->cfg_addr, hose->cfg_data);