[POWERPC] 86xx: Workaround PCI_PRIMARY_BUS usage

The Freescale PCI-e controllers have an issue in that they use the
PCI_PRIMARY_BUS register in the virtual P2P bridge to determine which
bus number to match on when generating a type 0 config cycle.  The
issue is if we are renumbering bus numbers to match Linux we will try
setting the PCI_PRIMARY_BUS and will not know which bus number to use
for generating type 0 config cycles.  We surpress writing the register
in the P2P bridge and always keep it at zero.

In the future when proper PCI domain support is working we should be
able to remove this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 3 insertions, 1 deletions

diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index 3825e1ac5312..6f3c0f674bbf 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -158,11 +158,13 @@ int __init mpc86xx_add_bridge(struct device_node *dev)
                 printk(KERN_WARNING "Can't get bus-range for %s, assume"
                        " bus 0\n", dev->full_name);
 
+        pci_assign_all_buses = 1;
         hose = pcibios_alloc_controller();
         if (!hose)
                 return -ENOMEM;
         hose->arch_data = dev;
-        hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG;
+        hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG |
+                                PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
 
         hose->first_busno = bus_range ? bus_range[0] : 0x0;
         hose->last_busno = bus_range ? bus_range[1] : 0xff;