diff options
author | Paul Mackerras <paulus@samba.org> | 2006-06-28 02:10:53 -0400 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-06-28 02:10:53 -0400 |
commit | 489244498ec99c949ecbd7105299066cff283dcd (patch) | |
tree | 003b5637cb8998ca0ab524e436c1a5eff25a9a1c /arch/powerpc/platforms/86xx/pci.c | |
parent | 649e85797259162f7fdc696420e7492f20226f2d (diff) | |
parent | 9ad494f62444ee37209e85173377c67612e66ef1 (diff) |
Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
Diffstat (limited to 'arch/powerpc/platforms/86xx/pci.c')
-rw-r--r-- | arch/powerpc/platforms/86xx/pci.c | 136 |
1 files changed, 8 insertions, 128 deletions
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index 6dfdcb875878..bc5139043112 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c | |||
@@ -121,15 +121,12 @@ static void __init setup_pcie_atmu(struct pci_controller *hose, struct resource | |||
121 | static void __init | 121 | static void __init |
122 | mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) | 122 | mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) |
123 | { | 123 | { |
124 | volatile struct ccsr_pex *pcie; | ||
125 | u16 cmd; | 124 | u16 cmd; |
126 | unsigned int temps; | 125 | unsigned int temps; |
127 | 126 | ||
128 | DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", | 127 | DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", |
129 | pcie_offset, pcie_size); | 128 | pcie_offset, pcie_size); |
130 | 129 | ||
131 | pcie = ioremap(pcie_offset, pcie_size); | ||
132 | |||
133 | early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); | 130 | early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); |
134 | cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | 131 | cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY |
135 | | PCI_COMMAND_IO; | 132 | | PCI_COMMAND_IO; |
@@ -143,6 +140,14 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) | |||
143 | early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); | 140 | early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); |
144 | } | 141 | } |
145 | 142 | ||
143 | int mpc86xx_exclude_device(u_char bus, u_char devfn) | ||
144 | { | ||
145 | if (bus == 0 && PCI_SLOT(devfn) == 0) | ||
146 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
147 | |||
148 | return PCIBIOS_SUCCESSFUL; | ||
149 | } | ||
150 | |||
146 | int __init add_bridge(struct device_node *dev) | 151 | int __init add_bridge(struct device_node *dev) |
147 | { | 152 | { |
148 | int len; | 153 | int len; |
@@ -197,128 +202,3 @@ int __init add_bridge(struct device_node *dev) | |||
197 | 202 | ||
198 | return 0; | 203 | return 0; |
199 | } | 204 | } |
200 | |||
201 | static void __devinit quirk_ali1575(struct pci_dev *dev) | ||
202 | { | ||
203 | unsigned short temp; | ||
204 | |||
205 | /* | ||
206 | * ALI1575 interrupts route table setup: | ||
207 | * | ||
208 | * IRQ pin IRQ# | ||
209 | * PIRQA ---- 3 | ||
210 | * PIRQB ---- 4 | ||
211 | * PIRQC ---- 5 | ||
212 | * PIRQD ---- 6 | ||
213 | * PIRQE ---- 9 | ||
214 | * PIRQF ---- 10 | ||
215 | * PIRQG ---- 11 | ||
216 | * PIRQH ---- 12 | ||
217 | * | ||
218 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
219 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
220 | */ | ||
221 | pci_write_config_dword(dev, 0x48, 0xb9317542); | ||
222 | |||
223 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | ||
224 | pci_write_config_byte(dev, 0x86, 0x0c); | ||
225 | |||
226 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | ||
227 | pci_write_config_byte(dev, 0x87, 0x0d); | ||
228 | |||
229 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | ||
230 | pci_write_config_byte(dev, 0x88, 0x0f); | ||
231 | |||
232 | /* USB 2.0 controller, interrupt: PIRQ7 */ | ||
233 | pci_write_config_byte(dev, 0x74, 0x06); | ||
234 | |||
235 | /* Audio controller, interrupt: PIRQE */ | ||
236 | pci_write_config_byte(dev, 0x8a, 0x0c); | ||
237 | |||
238 | /* Modem controller, interrupt: PIRQF */ | ||
239 | pci_write_config_byte(dev, 0x8b, 0x0d); | ||
240 | |||
241 | /* HD audio controller, interrupt: PIRQG */ | ||
242 | pci_write_config_byte(dev, 0x8c, 0x0e); | ||
243 | |||
244 | /* Serial ATA interrupt: PIRQD */ | ||
245 | pci_write_config_byte(dev, 0x8d, 0x0b); | ||
246 | |||
247 | /* SMB interrupt: PIRQH */ | ||
248 | pci_write_config_byte(dev, 0x8e, 0x0f); | ||
249 | |||
250 | /* PMU ACPI SCI interrupt: PIRQH */ | ||
251 | pci_write_config_byte(dev, 0x8f, 0x0f); | ||
252 | |||
253 | /* Primary PATA IDE IRQ: 14 | ||
254 | * Secondary PATA IDE IRQ: 15 | ||
255 | */ | ||
256 | pci_write_config_byte(dev, 0x44, 0x3d); | ||
257 | pci_write_config_byte(dev, 0x75, 0x0f); | ||
258 | |||
259 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | ||
260 | pci_read_config_word(dev, 0x46, &temp); | ||
261 | temp |= 0xc000; | ||
262 | pci_write_config_word(dev, 0x46, temp); | ||
263 | |||
264 | /* Set i8259 interrupt trigger | ||
265 | * IRQ 3: Level | ||
266 | * IRQ 4: Level | ||
267 | * IRQ 5: Level | ||
268 | * IRQ 6: Level | ||
269 | * IRQ 7: Level | ||
270 | * IRQ 9: Level | ||
271 | * IRQ 10: Level | ||
272 | * IRQ 11: Level | ||
273 | * IRQ 12: Level | ||
274 | * IRQ 14: Edge | ||
275 | * IRQ 15: Edge | ||
276 | */ | ||
277 | outb(0xfa, 0x4d0); | ||
278 | outb(0x1e, 0x4d1); | ||
279 | } | ||
280 | |||
281 | static void __devinit quirk_uli5288(struct pci_dev *dev) | ||
282 | { | ||
283 | unsigned char c; | ||
284 | |||
285 | pci_read_config_byte(dev,0x83,&c); | ||
286 | c |= 0x80; | ||
287 | pci_write_config_byte(dev, 0x83, c); | ||
288 | |||
289 | pci_write_config_byte(dev, 0x09, 0x01); | ||
290 | pci_write_config_byte(dev, 0x0a, 0x06); | ||
291 | |||
292 | pci_read_config_byte(dev,0x83,&c); | ||
293 | c &= 0x7f; | ||
294 | pci_write_config_byte(dev, 0x83, c); | ||
295 | |||
296 | pci_read_config_byte(dev,0x84,&c); | ||
297 | c |= 0x01; | ||
298 | pci_write_config_byte(dev, 0x84, c); | ||
299 | } | ||
300 | |||
301 | static void __devinit quirk_uli5229(struct pci_dev *dev) | ||
302 | { | ||
303 | unsigned short temp; | ||
304 | pci_write_config_word(dev, 0x04, 0x0405); | ||
305 | pci_read_config_word(dev, 0x4a, &temp); | ||
306 | temp |= 0x1000; | ||
307 | pci_write_config_word(dev, 0x4a, temp); | ||
308 | } | ||
309 | |||
310 | static void __devinit early_uli5249(struct pci_dev *dev) | ||
311 | { | ||
312 | unsigned char temp; | ||
313 | pci_write_config_word(dev, 0x04, 0x0007); | ||
314 | pci_read_config_byte(dev, 0x7c, &temp); | ||
315 | pci_write_config_byte(dev, 0x7c, 0x80); | ||
316 | pci_write_config_byte(dev, 0x09, 0x01); | ||
317 | pci_write_config_byte(dev, 0x7c, temp); | ||
318 | dev->class |= 0x1; | ||
319 | } | ||
320 | |||
321 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | ||
322 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | ||
323 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | ||
324 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | ||