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authorBecky Bruce <bgill@freescale.com>2006-01-14 17:57:39 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-20 00:11:06 -0500
commit63dafe5728e7354bc3f15bd49f13f1f9a433e8fb (patch)
tree51ca2135b5c5952d79a636e91f9db9efde9bfe43 /arch/powerpc/platforms/85xx
parent837e9594fc3cb9a06bddd7ecf66151334a2e13d2 (diff)
[PATCH] powerpc: Updated Initial MPC8540 ADS port with OF Flat Dev
Updated patch for support for mpc8540_ads in arch/powerpc with a flat OF device tree. This patch does not yet support PCI or I2C. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/85xx')
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig74
-rw-r--r--arch/powerpc/platforms/85xx/Makefile5
-rw-r--r--arch/powerpc/platforms/85xx/mpc8540_ads.h60
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx.c31
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx.h17
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c208
6 files changed, 329 insertions, 66 deletions
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index c5bc2821d991..d3d0ff745e84 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -1,86 +1,30 @@
1config 85xx 1menu "Platform support"
2 bool 2 depends on PPC_85xx
3 depends on E500
4 default y
5
6config PPC_INDIRECT_PCI_BE
7 bool
8 depends on 85xx
9 default y
10
11menu "Freescale 85xx options"
12 depends on E500
13 3
14choice 4choice
15 prompt "Machine Type" 5 prompt "Machine Type"
16 depends on 85xx
17 default MPC8540_ADS 6 default MPC8540_ADS
18 7
19config MPC8540_ADS 8config MPC8540_ADS
20 bool "Freescale MPC8540 ADS" 9 bool "Freescale MPC8540 ADS"
21 help 10 help
22 This option enables support for the MPC 8540 ADS evaluation board. 11 This option enables support for the MPC 8540 ADS board
23
24config MPC8548_CDS
25 bool "Freescale MPC8548 CDS"
26 help
27 This option enablese support for the MPC8548 CDS evaluation board.
28
29config MPC8555_CDS
30 bool "Freescale MPC8555 CDS"
31 help
32 This option enablese support for the MPC8555 CDS evaluation board.
33
34config MPC8560_ADS
35 bool "Freescale MPC8560 ADS"
36 help
37 This option enables support for the MPC 8560 ADS evaluation board.
38
39config SBC8560
40 bool "WindRiver PowerQUICC III SBC8560"
41 help
42 This option enables support for the WindRiver PowerQUICC III
43 SBC8560 board.
44
45config STX_GP3
46 bool "Silicon Turnkey Express GP3"
47 help
48 This option enables support for the Silicon Turnkey Express GP3
49 board.
50 12
51endchoice 13endchoice
52 14
53# It's often necessary to know the specific 85xx processor type.
54# Fortunately, it is implied (so far) from the board type, so we
55# don't need to ask more redundant questions.
56config MPC8540 15config MPC8540
57 bool 16 bool
58 depends on MPC8540_ADS 17 select PPC_UDBG_16550
59 default y 18 select PPC_INDIRECT_PCI
60 19 default y if MPC8540_ADS
61config MPC8548
62 bool
63 depends on MPC8548_CDS
64 default y
65 20
66config MPC8555 21config PPC_INDIRECT_PCI_BE
67 bool
68 depends on MPC8555_CDS
69 default y
70
71config MPC8560
72 bool 22 bool
73 depends on SBC8560 || MPC8560_ADS || STX_GP3 23 depends on PPC_85xx
74 default y
75
76config 85xx_PCI2
77 bool "Supprt for 2nd PCI host controller"
78 depends on MPC8555_CDS
79 default y 24 default y
80 25
81config PPC_GEN550 26config MPIC
82 bool 27 bool
83 depends on MPC8540 || SBC8560 || MPC8555
84 default y 28 default y
85 29
86endmenu 30endmenu
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 6407197ffd89..b443206e61af 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -1 +1,4 @@
1# empty makefile so make clean works 1#
2# Makefile for the PowerPC 85xx linux kernel.
3#
4obj-$(CONFIG_PPC_85xx) += mpc85xx.o mpc85xx_ads.o
diff --git a/arch/powerpc/platforms/85xx/mpc8540_ads.h b/arch/powerpc/platforms/85xx/mpc8540_ads.h
new file mode 100644
index 000000000000..47609c97e01e
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc8540_ads.h
@@ -0,0 +1,60 @@
1/*
2 * arch/ppc/platforms/85xx/mpc8540_ads.h
3 *
4 * MPC8540ADS board definitions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * Copyright 2004 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#ifndef __MACH_MPC8540ADS_H__
18#define __MACH_MPC8540ADS_H__
19
20#include <linux/config.h>
21#include <linux/initrd.h>
22
23#define BOARD_CCSRBAR ((uint)0xe0000000)
24#define BCSR_ADDR ((uint)0xf8000000)
25#define BCSR_SIZE ((uint)(32 * 1024))
26
27/* PCI interrupt controller */
28#define PIRQA MPC85xx_IRQ_EXT1
29#define PIRQB MPC85xx_IRQ_EXT2
30#define PIRQC MPC85xx_IRQ_EXT3
31#define PIRQD MPC85xx_IRQ_EXT4
32
33#define MPC85XX_PCI1_LOWER_IO 0x00000000
34#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
35
36#define MPC85XX_PCI1_LOWER_MEM 0x80000000
37#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
38
39#define MPC85XX_PCI1_IO_BASE 0xe2000000
40#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
41
42#define MPC85XX_PCI1_IO_SIZE 0x01000000
43
44/* PCI config */
45#define PCI1_CFG_ADDR_OFFSET (0x8000)
46#define PCI1_CFG_DATA_OFFSET (0x8004)
47
48#define PCI2_CFG_ADDR_OFFSET (0x9000)
49#define PCI2_CFG_DATA_OFFSET (0x9004)
50
51/* Additional register for PCI-X configuration */
52#define PCIX_NEXT_CAP 0x60
53#define PCIX_CAP_ID 0x61
54#define PCIX_COMMAND 0x62
55#define PCIX_STATUS 0x64
56
57/* Offset of CPM register space */
58#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
59
60#endif /* __MACH_MPC8540ADS_H__ */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.c b/arch/powerpc/platforms/85xx/mpc85xx.c
new file mode 100644
index 000000000000..82510385d88a
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc85xx.c
@@ -0,0 +1,31 @@
1/*
2 * MPC85xx generic code.
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/irq.h>
14#include <linux/module.h>
15#include <asm/irq.h>
16
17extern void abort(void);
18
19void
20mpc85xx_restart(char *cmd)
21{
22 local_irq_disable();
23 abort();
24}
25
26/* For now this is a pass through */
27phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
28{
29 return addr;
30};
31EXPORT_SYMBOL(fixup_bigphys_addr);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h b/arch/powerpc/platforms/85xx/mpc85xx.h
new file mode 100644
index 000000000000..be75abb2a283
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc85xx.h
@@ -0,0 +1,17 @@
1/*
2 * arch/ppc/platforms/85xx/mpc85xx.h
3 *
4 * MPC85xx soc definitions/function decls
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * Copyright 2005 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17extern void mpc85xx_restart(char *);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
new file mode 100644
index 000000000000..41191e9aa528
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -0,0 +1,208 @@
1/*
2 * MPC85xx setup and early boot code plus other random bits.
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/config.h>
15#include <linux/stddef.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/errno.h>
19#include <linux/reboot.h>
20#include <linux/pci.h>
21#include <linux/kdev_t.h>
22#include <linux/major.h>
23#include <linux/console.h>
24#include <linux/delay.h>
25#include <linux/irq.h>
26#include <linux/seq_file.h>
27#include <linux/root_dev.h>
28#include <linux/serial.h>
29#include <linux/tty.h> /* for linux/serial_core.h */
30#include <linux/serial_core.h>
31#include <linux/initrd.h>
32#include <linux/module.h>
33#include <linux/fsl_devices.h>
34#include <linux/serial_core.h>
35#include <linux/serial_8250.h>
36
37#include <asm/system.h>
38#include <asm/pgtable.h>
39#include <asm/page.h>
40#include <asm/atomic.h>
41#include <asm/time.h>
42#include <asm/io.h>
43#include <asm/machdep.h>
44#include <asm/bootinfo.h>
45#include <asm/pci-bridge.h>
46#include <asm/mpc85xx.h>
47#include <asm/irq.h>
48#include <asm/immap_85xx.h>
49#include <asm/prom.h>
50#include <asm/mpic.h>
51#include <mm/mmu_decl.h>
52#include <asm/udbg.h>
53
54#include <sysdev/fsl_soc.h>
55#include "mpc85xx.h"
56
57#ifndef CONFIG_PCI
58unsigned long isa_io_base = 0;
59unsigned long isa_mem_base = 0;
60#endif
61
62
63/*
64 * Internal interrupts are all Level Sensitive, and Positive Polarity
65 *
66 * Note: Likely, this table and the following function should be
67 * obtained and derived from the OF Device Tree.
68 */
69static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
70 MPC85XX_INTERNAL_IRQ_SENSES,
71 0x0, /* External 0: */
72#if defined(CONFIG_PCI)
73 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */
74 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */
77#else
78 0x0, /* External 1: */
79 0x0, /* External 2: */
80 0x0, /* External 3: */
81 0x0, /* External 4: */
82#endif
83 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */
84 0x0, /* External 6: */
85 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
86 0x0, /* External 8: */
87 0x0, /* External 9: */
88 0x0, /* External 10: */
89 0x0, /* External 11: */
90};
91
92
93void __init mpc85xx_ads_pic_init(void)
94{
95 struct mpic *mpic1;
96 phys_addr_t OpenPIC_PAddr;
97
98 /* Determine the Physical Address of the OpenPIC regs */
99 OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET;
100
101 mpic1 = mpic_alloc(OpenPIC_PAddr,
102 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
103 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250,
104 mpc85xx_ads_openpic_initsenses,
105 sizeof(mpc85xx_ads_openpic_initsenses), " OpenPIC ");
106 BUG_ON(mpic1 == NULL);
107 mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200);
108 mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280);
109 mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300);
110 mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380);
111 mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400);
112 mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480);
113 mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500);
114 mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580);
115
116 /* dummy mappings to get to 48 */
117 mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600);
118 mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680);
119 mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700);
120 mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780);
121
122 /* External ints */
123 mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000);
124 mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080);
125 mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100);
126 mpic_init(mpic1);
127}
128
129
130/*
131 * Setup the architecture
132 */
133static void __init
134mpc85xx_ads_setup_arch(void)
135{
136 struct device_node *cpu;
137
138 if (ppc_md.progress)
139 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
140
141 cpu = of_find_node_by_type(NULL, "cpu");
142 if (cpu != 0) {
143 unsigned int *fp;
144
145 fp = (int *)get_property(cpu, "clock-frequency", NULL);
146 if (fp != 0)
147 loops_per_jiffy = *fp / HZ;
148 else
149 loops_per_jiffy = 50000000 / HZ;
150 of_node_put(cpu);
151 }
152
153#ifdef CONFIG_ROOT_NFS
154 ROOT_DEV = Root_NFS;
155#else
156 ROOT_DEV = Root_HDA1;
157#endif
158}
159
160
161void
162mpc85xx_ads_show_cpuinfo(struct seq_file *m)
163{
164 uint pvid, svid, phid1;
165 uint memsize = total_memory;
166
167 pvid = mfspr(SPRN_PVR);
168 svid = mfspr(SPRN_SVR);
169
170 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
171 seq_printf(m, "Machine\t\t: mpc85xx\n");
172 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
173 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
174
175 /* Display cpu Pll setting */
176 phid1 = mfspr(SPRN_HID1);
177 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
178
179 /* Display the amount of memory */
180 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
181}
182
183
184void __init
185platform_init(void)
186{
187 ppc_md.setup_arch = mpc85xx_ads_setup_arch;
188 ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
189
190 ppc_md.init_IRQ = mpc85xx_ads_pic_init;
191 ppc_md.get_irq = mpic_get_irq;
192
193 ppc_md.restart = mpc85xx_restart;
194 ppc_md.power_off = NULL;
195 ppc_md.halt = NULL;
196
197 ppc_md.time_init = NULL;
198 ppc_md.set_rtc_time = NULL;
199 ppc_md.get_rtc_time = NULL;
200 ppc_md.calibrate_decr = generic_calibrate_decr;
201
202 ppc_md.progress = udbg_progress;
203
204 if (ppc_md.progress)
205 ppc_md.progress("mpc85xx_ads platform_init(): exit", 0);
206}
207
208
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