Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (99 commits)
  drivers/virt: add missing linux/interrupt.h to fsl_hypervisor.c
  powerpc/85xx: fix mpic configuration in CAMP mode
  powerpc: Copy back TIF flags on return from softirq stack
  powerpc/64: Make server perfmon only built on ppc64 server devices
  powerpc/pseries: Fix hvc_vio.c build due to recent changes
  powerpc: Exporting boot_cpuid_phys
  powerpc: Add CFAR to oops output
  hvc_console: Add kdb support
  powerpc/pseries: Fix hvterm_raw_get_chars to accept < 16 chars, fixing xmon
  powerpc/irq: Quieten irq mapping printks
  powerpc: Enable lockup and hung task detectors in pseries and ppc64 defeconfigs
  powerpc: Add mpt2sas driver to pseries and ppc64 defconfig
  powerpc: Disable IRQs off tracer in ppc64 defconfig
  powerpc: Sync pseries and ppc64 defconfigs
  powerpc/pseries/hvconsole: Fix dropped console output
  hvc_console: Improve tty/console put_chars handling
  powerpc/kdump: Fix timeout in crash_kexec_wait_realmode
  powerpc/mm: Fix output of total_ram.
  powerpc/cpufreq: Add cpufreq driver for Momentum Maple boards
  powerpc: Correct annotations of pmu registration functions
  ...

Fix up trivial Kconfig/Makefile conflicts in arch/powerpc, drivers, and
drivers/cpufreq

13 files changed, 552 insertions, 49 deletions

diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index b6976e1726e4..498534cd5265 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -67,6 +67,16 @@ config MPC85xx_RDB
         help
           This option enables support for the MPC85xx RDB (P2020 RDB) board
 
+config P1010_RDB
+        bool "Freescale P1010RDB"
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for the MPC85xx RDB (P1010 RDB) board
+
+          P1010RDB contains P1010Si, which provides CPU performance up to 800
+          MHz and 1600 DMIPS, additional functionality and faster interfaces
+          (DDR3/3L, SATA II, and PCI  Express).
+
 config P1022_DS
         bool "Freescale P1022 DS"
         select DEFAULT_UIMAGE
@@ -75,6 +85,12 @@ config P1022_DS
         help
           This option enables support for the Freescale P1022DS reference board.
 
+config P1023_RDS
+        bool "Freescale P1023 RDS"
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for the P1023 RDS board
+
 config SOCRATES
         bool "Socrates"
         select DEFAULT_UIMAGE
@@ -155,6 +171,18 @@ config SBC8560
         help
           This option enables support for the Wind River SBC8560 board
 
+config P2040_RDB
+        bool "Freescale P2040 RDB"
+        select DEFAULT_UIMAGE
+        select PPC_E500MC
+        select PHYS_64BIT
+        select SWIOTLB
+        select MPC8xxx_GPIO
+        select HAS_RAPIDIO
+        select PPC_EPAPR_HV_PIC
+        help
+          This option enables support for the P2040 RDB board
+
 config P3041_DS
         bool "Freescale P3041 DS"
         select DEFAULT_UIMAGE
@@ -163,6 +191,7 @@ config P3041_DS
         select SWIOTLB
         select MPC8xxx_GPIO
         select HAS_RAPIDIO
+        select PPC_EPAPR_HV_PIC
         help
           This option enables support for the P3041 DS board
 
@@ -174,6 +203,7 @@ config P4080_DS
         select SWIOTLB
         select MPC8xxx_GPIO
         select HAS_RAPIDIO
+        select PPC_EPAPR_HV_PIC
         help
           This option enables support for the P4080 DS board
 
@@ -188,6 +218,7 @@ config P5020_DS
         select SWIOTLB
         select MPC8xxx_GPIO
         select HAS_RAPIDIO
+        select PPC_EPAPR_HV_PIC
         help
           This option enables support for the P5020 DS board
 
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index dd70db77d63e..a971b32c5c0a 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -10,7 +10,10 @@ obj-$(CONFIG_MPC8536_DS)  += mpc8536_ds.o
 obj-$(CONFIG_MPC85xx_DS)  += mpc85xx_ds.o
 obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
 obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
+obj-$(CONFIG_P1010_RDB)   += p1010rdb.o
 obj-$(CONFIG_P1022_DS)    += p1022_ds.o
+obj-$(CONFIG_P1023_RDS)   += p1023_rds.o
+obj-$(CONFIG_P2040_RDB)   += p2040_rdb.o corenet_ds.o
 obj-$(CONFIG_P3041_DS)    += p3041_ds.o corenet_ds.o
 obj-$(CONFIG_P4080_DS)    += p4080_ds.o corenet_ds.o
 obj-$(CONFIG_P5020_DS)    += p5020_ds.o corenet_ds.o
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 2ab338c9ac37..802ad110b757 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -3,7 +3,7 @@
  *
  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -22,6 +22,7 @@
 #include <asm/time.h>
 #include <asm/machdep.h>
 #include <asm/pci-bridge.h>
+#include <asm/ppc-pci.h>
 #include <mm/mmu_decl.h>
 #include <asm/prom.h>
 #include <asm/udbg.h>
@@ -61,10 +62,6 @@ void __init corenet_ds_pic_init(void)
         mpic_init(mpic);
 }
 
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif
-
 /*
  * Setup the architecture
  */
@@ -85,18 +82,19 @@ void __init corenet_ds_setup_arch(void)
 #endif
 
 #ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,p4080-pcie") {
-                struct resource rsrc;
-                of_address_to_resource(np, 0, &rsrc);
-                if ((rsrc.start & 0xfffff) == primary_phb_addr)
-                        fsl_add_bridge(np, 1);
-                else
+        for_each_node_by_type(np, "pci") {
+                if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
+                    of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2")) {
                         fsl_add_bridge(np, 0);
-
-                hose = pci_find_hose_for_OF_device(np);
-                max = min(max, hose->dma_window_base_cur +
-                                hose->dma_window_size);
+                        hose = pci_find_hose_for_OF_device(np);
+                        max = min(max, hose->dma_window_base_cur +
+                                        hose->dma_window_size);
+                }
         }
+
+#ifdef CONFIG_PPC64
+        pci_devs_phb_init();
+#endif
 #endif
 
 #ifdef CONFIG_SWIOTLB
@@ -116,6 +114,19 @@ static const struct of_device_id of_device_ids[] __devinitconst = {
         {
                 .compatible     = "fsl,rapidio-delta",
         },
+        {
+                .compatible     = "fsl,p4080-pcie",
+        },
+        {
+                .compatible     = "fsl,qoriq-pcie-v2.2",
+        },
+        /* The following two are for the Freescale hypervisor */
+        {
+                .name           = "hypervisor",
+        },
+        {
+                .name           = "handles",
+        },
         {}
 };
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index c7b97f70312e..1b9a8cf1873a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -83,7 +83,8 @@ void __init mpc85xx_ds_pic_init(void)
         if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
                 mpic = mpic_alloc(np, r.start,
                         MPIC_PRIMARY |
-                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
+                        MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
         } else {
                 mpic = mpic_alloc(np, r.start,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 088f30b0c088..f5ff9110c97e 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -58,10 +58,11 @@ void __init mpc85xx_rdb_pic_init(void)
                 return;
         }
 
-        if (of_flat_dt_is_compatible(root, "fsl,85XXRDB-CAMP")) {
+        if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
                 mpic = mpic_alloc(np, r.start,
                         MPIC_PRIMARY |
-                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
+                        MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
         } else {
                 mpic = mpic_alloc(np, r.start,
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
new file mode 100644
index 000000000000..d7387fa7f534
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -0,0 +1,122 @@
+/*
+ * P1010RDB Board Setup
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+void __init p1010_rdb_pic_init(void)
+{
+        struct mpic *mpic;
+        struct resource r;
+        struct device_node *np;
+
+        np = of_find_node_by_type(NULL, "open-pic");
+        if (np == NULL) {
+                printk(KERN_ERR "Could not find open-pic node\n");
+                return;
+        }
+
+        if (of_address_to_resource(np, 0, &r)) {
+                printk(KERN_ERR "Failed to map mpic register space\n");
+                of_node_put(np);
+                return;
+        }
+
+        mpic = mpic_alloc(np, r.start, MPIC_PRIMARY | MPIC_WANTS_RESET |
+          MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
+          0, 256, " OpenPIC  ");
+
+        BUG_ON(mpic == NULL);
+        of_node_put(np);
+
+        mpic_init(mpic);
+
+}
+
+
+/*
+ * Setup the architecture
+ */
+static void __init p1010_rdb_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+        struct device_node *np;
+#endif
+
+        if (ppc_md.progress)
+                ppc_md.progress("p1010_rdb_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+        for_each_node_by_type(np, "pci") {
+                if (of_device_is_compatible(np, "fsl,p1010-pcie"))
+                        fsl_add_bridge(np, 0);
+        }
+
+#endif
+
+        printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
+}
+
+static struct of_device_id __initdata p1010rdb_ids[] = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .compatible = "simple-bus", },
+        {},
+};
+
+static int __init p1010rdb_publish_devices(void)
+{
+        return of_platform_bus_probe(NULL, p1010rdb_ids, NULL);
+}
+machine_device_initcall(p1010_rdb, p1010rdb_publish_devices);
+machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init p1010_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "fsl,P1010RDB"))
+                return 1;
+        return 0;
+}
+
+define_machine(p1010_rdb) {
+        .name                   = "P1010 RDB",
+        .probe                  = p1010_rdb_probe,
+        .setup_arch             = p1010_rdb_setup_arch,
+        .init_IRQ               = p1010_rdb_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 7eb5c40c069f..266b3aadfe5e 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -129,6 +129,7 @@ static void p1022ds_set_gamma_table(int monitor_port, char *gamma_table_base)
 static void p1022ds_set_monitor_port(int monitor_port)
 {
         struct device_node *pixis_node;
+        void __iomem *pixis;
         u8 __iomem *brdcfg1;
 
         pixis_node = of_find_compatible_node(NULL, NULL, "fsl,p1022ds-pixis");
@@ -137,12 +138,12 @@ static void p1022ds_set_monitor_port(int monitor_port)
                 return;
         }
 
-        brdcfg1 = of_iomap(pixis_node, 0);
-        if (!brdcfg1) {
+        pixis = of_iomap(pixis_node, 0);
+        if (!pixis) {
                 pr_err("p1022ds: could not map ngPIXIS registers\n");
                 return;
         }
-        brdcfg1 += 9;   /* BRDCFG1 is at offset 9 in the ngPIXIS */
+        brdcfg1 = pixis + 9;    /* BRDCFG1 is at offset 9 in the ngPIXIS */
 
         switch (monitor_port) {
         case 0: /* DVI */
@@ -158,6 +159,8 @@ static void p1022ds_set_monitor_port(int monitor_port)
         default:
                 pr_err("p1022ds: unsupported monitor port %i\n", monitor_port);
         }
+
+        iounmap(pixis);
 }
 
 /**
@@ -192,8 +195,13 @@ void p1022ds_set_pixel_clock(unsigned int pixclock)
         do_div(temp, pixclock);
         freq = temp;
 
-        /* pixclk is the ratio of the platform clock to the pixel clock */
+        /*
+         * 'pxclk' is the ratio of the platform clock to the pixel clock.
+         * This number is programmed into the CLKDVDR register, and the valid
+         * range of values is 2-255.
+         */
         pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq);
+        pxclk = clamp_t(u32, pxclk, 2, 255);
 
         /* Disable the pixel clock, and set it to non-inverted and no delay */
         clrbits32(&guts->clkdvdr,
@@ -201,6 +209,8 @@ void p1022ds_set_pixel_clock(unsigned int pixclock)
 
         /* Enable the clock and set the pxclk */
         setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));
+
+        iounmap(guts);
 }
 
 /**
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c
new file mode 100644
index 000000000000..835e0b335bfa
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p1023_rds.c
@@ -0,0 +1,162 @@
+/*
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ *
+ * Author: Roy Zang <tie-fei.zang@freescale.com>
+ *
+ * Description:
+ * P1023 RDS Board Setup
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+#ifdef CONFIG_SMP
+void __init mpc85xx_smp_init(void);
+#endif
+
+static void __init mpc85xx_rds_setup_arch(void)
+{
+        struct device_node *np;
+
+        if (ppc_md.progress)
+                ppc_md.progress("p1023_rds_setup_arch()", 0);
+
+        /* Map BCSR area */
+        np = of_find_node_by_name(NULL, "bcsr");
+        if (np != NULL) {
+                static u8 __iomem *bcsr_regs;
+
+                bcsr_regs = of_iomap(np, 0);
+                of_node_put(np);
+
+                if (!bcsr_regs) {
+                        printk(KERN_ERR
+                               "BCSR: Failed to map bcsr register space\n");
+                        return;
+                } else {
+#define BCSR15_I2C_BUS0_SEG_CLR         0x07
+#define BCSR15_I2C_BUS0_SEG2            0x02
+/*
+ * Note: Accessing exclusively i2c devices.
+ *
+ * The i2c controller selects initially ID EEPROM in the u-boot;
+ * but if menu configuration selects RTC support in the kernel,
+ * the i2c controller switches to select RTC chip in the kernel.
+ */
+#ifdef CONFIG_RTC_CLASS
+                        /* Enable RTC chip on the segment #2 of i2c */
+                        clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
+                        setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
+#endif
+
+                        iounmap(bcsr_regs);
+                }
+        }
+
+#ifdef CONFIG_PCI
+        for_each_compatible_node(np, "pci", "fsl,p1023-pcie")
+                fsl_add_bridge(np, 0);
+#endif
+
+#ifdef CONFIG_SMP
+        mpc85xx_smp_init();
+#endif
+}
+
+static struct of_device_id p1023_ids[] = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .compatible = "simple-bus", },
+        {},
+};
+
+
+static int __init p1023_publish_devices(void)
+{
+        of_platform_bus_probe(NULL, p1023_ids, NULL);
+
+        return 0;
+}
+
+machine_device_initcall(p1023_rds, p1023_publish_devices);
+
+static void __init mpc85xx_rds_pic_init(void)
+{
+        struct mpic *mpic;
+        struct resource r;
+        struct device_node *np = NULL;
+
+        np = of_find_node_by_type(NULL, "open-pic");
+        if (!np) {
+                printk(KERN_ERR "Could not find open-pic node\n");
+                return;
+        }
+
+        if (of_address_to_resource(np, 0, &r)) {
+                printk(KERN_ERR "Failed to map mpic register space\n");
+                of_node_put(np);
+                return;
+        }
+
+        mpic = mpic_alloc(np, r.start,
+                MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+                MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
+                0, 256, " OpenPIC  ");
+
+        BUG_ON(mpic == NULL);
+        of_node_put(np);
+
+        mpic_init(mpic);
+}
+
+static int __init p1023_rds_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        return of_flat_dt_is_compatible(root, "fsl,P1023RDS");
+
+}
+
+define_machine(p1023_rds) {
+        .name                   = "P1023 RDS",
+        .probe                  = p1023_rds_probe,
+        .setup_arch             = mpc85xx_rds_setup_arch,
+        .init_IRQ               = mpc85xx_rds_pic_init,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+};
+
diff --git a/arch/powerpc/platforms/85xx/p2040_rdb.c b/arch/powerpc/platforms/85xx/p2040_rdb.c
new file mode 100644
index 000000000000..32b56ac73dfb
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p2040_rdb.c
@@ -0,0 +1,88 @@
+/*
+ * P2040 RDB Setup
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/phy.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include <asm/ehv_pic.h>
+
+#include "corenet_ds.h"
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init p2040_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+        extern struct smp_ops_t smp_85xx_ops;
+#endif
+
+        if (of_flat_dt_is_compatible(root, "fsl,P2040RDB"))
+                return 1;
+
+        /* Check if we're running under the Freescale hypervisor */
+        if (of_flat_dt_is_compatible(root, "fsl,P2040RDB-hv")) {
+                ppc_md.init_IRQ = ehv_pic_init;
+                ppc_md.get_irq = ehv_pic_get_irq;
+                ppc_md.restart = fsl_hv_restart;
+                ppc_md.power_off = fsl_hv_halt;
+                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+                /*
+                 * Disable the timebase sync operations because we can't write
+                 * to the timebase registers under the hypervisor.
+                  */
+                smp_85xx_ops.give_timebase = NULL;
+                smp_85xx_ops.take_timebase = NULL;
+#endif
+                return 1;
+        }
+
+        return 0;
+}
+
+define_machine(p2040_rdb) {
+        .name                   = "P2040 RDB",
+        .probe                  = p2040_rdb_probe,
+        .setup_arch             = corenet_ds_setup_arch,
+        .init_IRQ               = corenet_ds_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_coreint_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+        .power_save             = e500_idle,
+};
+
+machine_device_initcall(p2040_rdb, corenet_ds_publish_devices);
+
+#ifdef CONFIG_SWIOTLB
+machine_arch_initcall(p2040_rdb, swiotlb_setup_bus_notifier);
+#endif
diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c
index 0ed52e18298c..96d99a374dcf 100644
--- a/arch/powerpc/platforms/85xx/p3041_ds.c
+++ b/arch/powerpc/platforms/85xx/p3041_ds.c
@@ -30,6 +30,7 @@
 #include <linux/of_platform.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include <asm/ehv_pic.h>
 
 #include "corenet_ds.h"
 
@@ -39,8 +40,32 @@
 static int __init p3041_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+        extern struct smp_ops_t smp_85xx_ops;
+#endif
+
+        if (of_flat_dt_is_compatible(root, "fsl,P3041DS"))
+                return 1;
+
+        /* Check if we're running under the Freescale hypervisor */
+        if (of_flat_dt_is_compatible(root, "fsl,P3041DS-hv")) {
+                ppc_md.init_IRQ = ehv_pic_init;
+                ppc_md.get_irq = ehv_pic_get_irq;
+                ppc_md.restart = fsl_hv_restart;
+                ppc_md.power_off = fsl_hv_halt;
+                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+                /*
+                 * Disable the timebase sync operations because we can't write
+                 * to the timebase registers under the hypervisor.
+                  */
+                smp_85xx_ops.give_timebase = NULL;
+                smp_85xx_ops.take_timebase = NULL;
+#endif
+                return 1;
+        }
 
-        return of_flat_dt_is_compatible(root, "fsl,P3041DS");
+        return 0;
 }
 
 define_machine(p3041_ds) {
@@ -55,6 +80,7 @@ define_machine(p3041_ds) {
         .restart                = fsl_rstcr_restart,
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
+        .power_save             = e500_idle,
 };
 
 machine_device_initcall(p3041_ds, corenet_ds_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c
index 84170460497b..d1b21d7663e3 100644
--- a/arch/powerpc/platforms/85xx/p4080_ds.c
+++ b/arch/powerpc/platforms/85xx/p4080_ds.c
@@ -29,31 +29,42 @@
 #include <linux/of_platform.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include <asm/ehv_pic.h>
 
 #include "corenet_ds.h"
 
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif
-
 /*
  * Called very early, device-tree isn't unflattened
  */
 static int __init p4080_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+        extern struct smp_ops_t smp_85xx_ops;
+#endif
 
-        if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) {
-#ifdef CONFIG_PCI
-                /* treat PCIe1 as primary,
-                 * shouldn't matter as we have no ISA on the board
-                 */
-                primary_phb_addr = 0x0000;
+        if (of_flat_dt_is_compatible(root, "fsl,P4080DS"))
+                return 1;
+
+        /* Check if we're running under the Freescale hypervisor */
+        if (of_flat_dt_is_compatible(root, "fsl,P4080DS-hv")) {
+                ppc_md.init_IRQ = ehv_pic_init;
+                ppc_md.get_irq = ehv_pic_get_irq;
+                ppc_md.restart = fsl_hv_restart;
+                ppc_md.power_off = fsl_hv_halt;
+                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+                /*
+                 * Disable the timebase sync operations because we can't write
+                 * to the timebase registers under the hypervisor.
+                  */
+                smp_85xx_ops.give_timebase = NULL;
+                smp_85xx_ops.take_timebase = NULL;
 #endif
                 return 1;
-        } else {
-                return 0;
         }
+
+        return 0;
 }
 
 define_machine(p4080_ds) {
@@ -68,7 +79,10 @@ define_machine(p4080_ds) {
         .restart                = fsl_rstcr_restart,
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
+        .power_save             = e500_idle,
 };
 
 machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
+#ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
+#endif
diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c
index 7467b712ee00..e8cba5004fd8 100644
--- a/arch/powerpc/platforms/85xx/p5020_ds.c
+++ b/arch/powerpc/platforms/85xx/p5020_ds.c
@@ -30,6 +30,7 @@
 #include <linux/of_platform.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include <asm/ehv_pic.h>
 
 #include "corenet_ds.h"
 
@@ -39,8 +40,32 @@
 static int __init p5020_ds_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+        extern struct smp_ops_t smp_85xx_ops;
+#endif
+
+        if (of_flat_dt_is_compatible(root, "fsl,P5020DS"))
+                return 1;
+
+        /* Check if we're running under the Freescale hypervisor */
+        if (of_flat_dt_is_compatible(root, "fsl,P5020DS-hv")) {
+                ppc_md.init_IRQ = ehv_pic_init;
+                ppc_md.get_irq = ehv_pic_get_irq;
+                ppc_md.restart = fsl_hv_restart;
+                ppc_md.power_off = fsl_hv_halt;
+                ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+                /*
+                 * Disable the timebase sync operations because we can't write
+                 * to the timebase registers under the hypervisor.
+                  */
+                smp_85xx_ops.give_timebase = NULL;
+                smp_85xx_ops.take_timebase = NULL;
+#endif
+                return 1;
+        }
 
-        return of_flat_dt_is_compatible(root, "fsl,P5020DS");
+        return 0;
 }
 
 define_machine(p5020_ds) {
@@ -60,6 +85,11 @@ define_machine(p5020_ds) {
         .restart                = fsl_rstcr_restart,
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = udbg_progress,
+#ifdef CONFIG_PPC64
+        .power_save             = book3e_idle,
+#else
+        .power_save             = e500_idle,
+#endif
 };
 
 machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index d6a93a10c0f5..5b9b901f6443 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -2,7 +2,7 @@
  * Author: Andy Fleming <afleming@freescale.com>
  *         Kumar Gala <galak@kernel.crashing.org>
  *
- * Copyright 2006-2008 Freescale Semiconductor Inc.
+ * Copyright 2006-2008, 2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -111,14 +111,6 @@ smp_85xx_kick_cpu(int nr)
         return 0;
 }
 
-static void __init
-smp_85xx_setup_cpu(int cpu_nr)
-{
-        mpic_setup_this_cpu();
-        if (cpu_has_feature(CPU_FTR_DBELL))
-                doorbell_setup_this_cpu();
-}
-
 struct smp_ops_t smp_85xx_ops = {
         .kick_cpu = smp_85xx_kick_cpu,
 #ifdef CONFIG_KEXEC
@@ -224,24 +216,36 @@ static void mpc85xx_smp_machine_kexec(struct kimage *image)
 }
 #endif /* CONFIG_KEXEC */
 
+static void __init
+smp_85xx_setup_cpu(int cpu_nr)
+{
+        if (smp_85xx_ops.probe == smp_mpic_probe)
+                mpic_setup_this_cpu();
+
+        if (cpu_has_feature(CPU_FTR_DBELL))
+                doorbell_setup_this_cpu();
+}
+
 void __init mpc85xx_smp_init(void)
 {
         struct device_node *np;
 
+        smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
+
         np = of_find_node_by_type(NULL, "open-pic");
         if (np) {
                 smp_85xx_ops.probe = smp_mpic_probe;
-                smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
                 smp_85xx_ops.message_pass = smp_mpic_message_pass;
         }
 
         if (cpu_has_feature(CPU_FTR_DBELL)) {
-                smp_85xx_ops.message_pass = smp_muxed_ipi_message_pass;
+                /*
+                 * If left NULL, .message_pass defaults to
+                 * smp_muxed_ipi_message_pass
+                 */
                 smp_85xx_ops.cause_ipi = doorbell_cause_ipi;
         }
 
-        BUG_ON(!smp_85xx_ops.message_pass);
-
         smp_ops = &smp_85xx_ops;
 
 #ifdef CONFIG_KEXEC