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authorJohn Rigby <jrigby@freescale.com>2008-06-26 13:07:57 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-07-16 18:57:35 -0400
commit76fe1ffce94067fc82d1d958f826eb9f1df53910 (patch)
treec6c6a7bdd6c7d6d2fb7374789868fed40d93fdd7 /arch/powerpc/platforms/83xx/pci.c
parentb500563b22ea2a78760b2ccaa328426b0388e2ee (diff)
powerpc: Move mpc83xx_add_bridge to fsl_pci.c
This allows other platforms with the same pci block like MPC5121 to use it. Signed-off-by: John Rigby <jrigby@freescale.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/83xx/pci.c')
-rw-r--r--arch/powerpc/platforms/83xx/pci.c91
1 files changed, 0 insertions, 91 deletions
diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c
deleted file mode 100644
index 14f1080c6c9d..000000000000
--- a/arch/powerpc/platforms/83xx/pci.c
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * FSL SoC setup code
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/stddef.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/errno.h>
16#include <linux/pci.h>
17#include <linux/delay.h>
18#include <linux/irq.h>
19#include <linux/module.h>
20
21#include <asm/system.h>
22#include <asm/atomic.h>
23#include <asm/io.h>
24#include <asm/pci-bridge.h>
25#include <asm/prom.h>
26#include <sysdev/fsl_soc.h>
27
28#undef DEBUG
29
30#ifdef DEBUG
31#define DBG(x...) printk(x)
32#else
33#define DBG(x...)
34#endif
35
36int __init mpc83xx_add_bridge(struct device_node *dev)
37{
38 int len;
39 struct pci_controller *hose;
40 struct resource rsrc;
41 const int *bus_range;
42 int primary = 1, has_address = 0;
43 phys_addr_t immr = get_immrbase();
44
45 DBG("Adding PCI host bridge %s\n", dev->full_name);
46
47 /* Fetch host bridge registers address */
48 has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
49
50 /* Get bus range if any */
51 bus_range = of_get_property(dev, "bus-range", &len);
52 if (bus_range == NULL || len < 2 * sizeof(int)) {
53 printk(KERN_WARNING "Can't get bus-range for %s, assume"
54 " bus 0\n", dev->full_name);
55 }
56
57 ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
58 hose = pcibios_alloc_controller(dev);
59 if (!hose)
60 return -ENOMEM;
61
62 hose->first_busno = bus_range ? bus_range[0] : 0;
63 hose->last_busno = bus_range ? bus_range[1] : 0xff;
64
65 /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
66 * the other at 0x8600, we consider the 0x8500 the primary controller
67 */
68 /* PCI 1 */
69 if ((rsrc.start & 0xfffff) == 0x8500) {
70 setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
71 }
72 /* PCI 2 */
73 if ((rsrc.start & 0xfffff) == 0x8600) {
74 setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
75 primary = 0;
76 }
77
78 printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
79 "Firmware bus number: %d->%d\n",
80 (unsigned long long)rsrc.start, hose->first_busno,
81 hose->last_busno);
82
83 DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
84 hose, hose->cfg_addr, hose->cfg_data);
85
86 /* Interpret the "ranges" property */
87 /* This also maps the I/O region and sets isa_io/mem_base */
88 pci_process_bridge_OF_ranges(hose, dev, primary);
89
90 return 0;
91}