diff options
author | Holger Brunck <holger.brunck@keymile.com> | 2011-03-10 06:52:45 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2011-03-15 11:06:37 -0400 |
commit | c513e7c9f7df989124d3b668245df419e9141ca9 (patch) | |
tree | 616bf027406341db0062c23a2dc1d2b80a083ab8 /arch/powerpc/platforms/82xx/mgcoge.c | |
parent | 93e2b95c81042da479656b213acc92f7542c6c39 (diff) |
powerpc/82xx: rename and update mgcoge board support
The mgcoge board from keymile is now base for some other
similar boards. Therefore the board specific name mgcoge
was renamed to a generic name km82xx. Additionally some
enhancements were made:
- rework partition table in dts file
- add cpm2_pio_c gpio controller in dts file
- update defconfig
- add pin description for SCC1
- add pin description and configuration for USB
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Heiko Schocher <hs@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/82xx/mgcoge.c')
-rw-r--r-- | arch/powerpc/platforms/82xx/mgcoge.c | 180 |
1 files changed, 0 insertions, 180 deletions
diff --git a/arch/powerpc/platforms/82xx/mgcoge.c b/arch/powerpc/platforms/82xx/mgcoge.c deleted file mode 100644 index 7a5de9eb3c73..000000000000 --- a/arch/powerpc/platforms/82xx/mgcoge.c +++ /dev/null | |||
@@ -1,180 +0,0 @@ | |||
1 | /* | ||
2 | * Keymile mgcoge support | ||
3 | * Copyright 2008 DENX Software Engineering GmbH | ||
4 | * Author: Heiko Schocher <hs@denx.de> | ||
5 | * | ||
6 | * based on code from: | ||
7 | * Copyright 2007 Freescale Semiconductor, Inc. | ||
8 | * Author: Scott Wood <scottwood@freescale.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/init.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/fsl_devices.h> | ||
19 | #include <linux/of_platform.h> | ||
20 | |||
21 | #include <asm/io.h> | ||
22 | #include <asm/cpm2.h> | ||
23 | #include <asm/udbg.h> | ||
24 | #include <asm/machdep.h> | ||
25 | #include <asm/time.h> | ||
26 | #include <asm/mpc8260.h> | ||
27 | #include <asm/prom.h> | ||
28 | |||
29 | #include <sysdev/fsl_soc.h> | ||
30 | #include <sysdev/cpm2_pic.h> | ||
31 | |||
32 | #include "pq2.h" | ||
33 | |||
34 | static void __init mgcoge_pic_init(void) | ||
35 | { | ||
36 | struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic"); | ||
37 | if (!np) { | ||
38 | printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); | ||
39 | return; | ||
40 | } | ||
41 | |||
42 | cpm2_pic_init(np); | ||
43 | of_node_put(np); | ||
44 | } | ||
45 | |||
46 | struct cpm_pin { | ||
47 | int port, pin, flags; | ||
48 | }; | ||
49 | |||
50 | static __initdata struct cpm_pin mgcoge_pins[] = { | ||
51 | |||
52 | /* SMC2 */ | ||
53 | {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
54 | {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
55 | |||
56 | /* SCC4 */ | ||
57 | {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
58 | {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
59 | {2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
60 | {2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
61 | {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
62 | {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
63 | |||
64 | /* FCC1 */ | ||
65 | {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
66 | {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
67 | {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
68 | {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
69 | {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
70 | {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
71 | {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
72 | {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
73 | {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | ||
74 | {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | ||
75 | {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | ||
76 | {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | ||
77 | {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | ||
78 | {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, | ||
79 | |||
80 | {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
81 | {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
82 | |||
83 | /* FCC2 */ | ||
84 | {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
85 | {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
86 | {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
87 | {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
88 | {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
89 | {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
90 | {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
91 | {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
92 | {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
93 | {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
94 | {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
95 | {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, | ||
96 | {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
97 | {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
98 | |||
99 | {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
100 | {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
101 | |||
102 | /* MDC */ | ||
103 | {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, | ||
104 | |||
105 | #if defined(CONFIG_I2C_CPM) | ||
106 | /* I2C */ | ||
107 | {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, | ||
108 | {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, | ||
109 | #endif | ||
110 | }; | ||
111 | |||
112 | static void __init init_ioports(void) | ||
113 | { | ||
114 | int i; | ||
115 | |||
116 | for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) { | ||
117 | const struct cpm_pin *pin = &mgcoge_pins[i]; | ||
118 | cpm2_set_pin(pin->port, pin->pin, pin->flags); | ||
119 | } | ||
120 | |||
121 | cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8); | ||
122 | cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX); | ||
123 | cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX); | ||
124 | cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX); | ||
125 | cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX); | ||
126 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); | ||
127 | cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); | ||
128 | } | ||
129 | |||
130 | static void __init mgcoge_setup_arch(void) | ||
131 | { | ||
132 | if (ppc_md.progress) | ||
133 | ppc_md.progress("mgcoge_setup_arch()", 0); | ||
134 | |||
135 | cpm2_reset(); | ||
136 | |||
137 | /* When this is set, snooping CPM DMA from RAM causes | ||
138 | * machine checks. See erratum SIU18. | ||
139 | */ | ||
140 | clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); | ||
141 | |||
142 | init_ioports(); | ||
143 | |||
144 | if (ppc_md.progress) | ||
145 | ppc_md.progress("mgcoge_setup_arch(), finish", 0); | ||
146 | } | ||
147 | |||
148 | static __initdata struct of_device_id of_bus_ids[] = { | ||
149 | { .compatible = "simple-bus", }, | ||
150 | {}, | ||
151 | }; | ||
152 | |||
153 | static int __init declare_of_platform_devices(void) | ||
154 | { | ||
155 | of_platform_bus_probe(NULL, of_bus_ids, NULL); | ||
156 | |||
157 | return 0; | ||
158 | } | ||
159 | machine_device_initcall(mgcoge, declare_of_platform_devices); | ||
160 | |||
161 | /* | ||
162 | * Called very early, device-tree isn't unflattened | ||
163 | */ | ||
164 | static int __init mgcoge_probe(void) | ||
165 | { | ||
166 | unsigned long root = of_get_flat_dt_root(); | ||
167 | return of_flat_dt_is_compatible(root, "keymile,mgcoge"); | ||
168 | } | ||
169 | |||
170 | define_machine(mgcoge) | ||
171 | { | ||
172 | .name = "Keymile MGCOGE", | ||
173 | .probe = mgcoge_probe, | ||
174 | .setup_arch = mgcoge_setup_arch, | ||
175 | .init_IRQ = mgcoge_pic_init, | ||
176 | .get_irq = cpm2_get_irq, | ||
177 | .calibrate_decr = generic_calibrate_decr, | ||
178 | .restart = pq2_restart, | ||
179 | .progress = udbg_progress, | ||
180 | }; | ||