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authorLinus Torvalds <torvalds@linux-foundation.org>2009-01-28 12:01:42 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-28 12:01:42 -0500
commitc4568d6c7ec7557fbe8656286aea29f67388f7d4 (patch)
tree783873ec85ca67f2de69986645b1b007231f8f6d /arch/powerpc/platforms/44x/warp-nand.c
parent78a768b6ca40e104442ade090226ed4ee0e6cebf (diff)
parent4c456a67f501b8b15542c7c21c28812bf88f484b (diff)
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code powerpc/pseries: Correct VIO bus accounting problem in CMO env. powerpc: More printing warning fixes for the l64 to ll64 conversion powerpc: Remove arch/ppc cruft from Kconfig powerpc: Printing fix for l64 to ll64 conversion: phyp_dump.c powerpc/embedded6xx: Update defconfigs powerpc/8xx: Update defconfigs powerpc/86xx: Update defconfigs powerpc/83xx: Update defconfigs powerpc/85xx: Update defconfigs powerpc/mpc8313erdb: fix kernel panic because mdio device is not probed powerpc/4xx: Update multi-board PowerPC 4xx defconfigs powerpc/44x: Update PowerPC 44x defconfigs powerpc/40x: Update PowerPC 40x defconfigs powerpc/85xx: Fix typo in mpc8572ds dts powerpc/44x: Warp patches for the new NDFC driver powerpc/4xx: DTS: Add Add'l SDRAM0 Compatible and Interrupt Info
Diffstat (limited to 'arch/powerpc/platforms/44x/warp-nand.c')
-rw-r--r--arch/powerpc/platforms/44x/warp-nand.c135
1 files changed, 0 insertions, 135 deletions
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
deleted file mode 100644
index 89ecd76127d8..000000000000
--- a/arch/powerpc/platforms/44x/warp-nand.c
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * PIKA Warp(tm) NAND flash specific routines
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 */
7
8#include <linux/platform_device.h>
9#include <linux/mtd/mtd.h>
10#include <linux/mtd/map.h>
11#include <linux/mtd/partitions.h>
12#include <linux/mtd/nand.h>
13#include <linux/mtd/ndfc.h>
14#include <linux/of.h>
15#include <asm/machdep.h>
16
17
18#ifdef CONFIG_MTD_NAND_NDFC
19
20#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
21
22#define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL
23#define WARP_NAND_FLASH_REG_SIZE 0x2000
24
25static struct resource warp_ndfc = {
26 .start = WARP_NAND_FLASH_REG_ADDR,
27 .end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE - 1,
28 .flags = IORESOURCE_MEM,
29};
30
31static struct mtd_partition nand_parts[] = {
32 {
33 .name = "kernel",
34 .offset = 0,
35 .size = 0x0200000
36 },
37 {
38 .name = "root",
39 .offset = 0x0200000,
40 .size = 0x3E00000
41 },
42 {
43 .name = "persistent",
44 .offset = 0x4000000,
45 .size = 0x4000000
46 },
47 {
48 .name = "persistent1",
49 .offset = 0x8000000,
50 .size = 0x4000000
51 },
52 {
53 .name = "persistent2",
54 .offset = 0xC000000,
55 .size = 0x4000000
56 }
57};
58
59struct ndfc_controller_settings warp_ndfc_settings = {
60 .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
61 .ndfc_erpn = 0,
62};
63
64static struct ndfc_chip_settings warp_chip0_settings = {
65 .bank_settings = 0x80002222,
66};
67
68struct platform_nand_ctrl warp_nand_ctrl = {
69 .priv = &warp_ndfc_settings,
70};
71
72static struct platform_device warp_ndfc_device = {
73 .name = "ndfc-nand",
74 .id = 0,
75 .dev = {
76 .platform_data = &warp_nand_ctrl,
77 },
78 .num_resources = 1,
79 .resource = &warp_ndfc,
80};
81
82/* Do NOT set the ecclayout: let it default so it is correct for both
83 * 64M and 256M flash chips.
84 */
85static struct platform_nand_chip warp_nand_chip0 = {
86 .nr_chips = 1,
87 .chip_offset = CS_NAND_0,
88 .nr_partitions = ARRAY_SIZE(nand_parts),
89 .partitions = nand_parts,
90 .chip_delay = 20,
91 .priv = &warp_chip0_settings,
92};
93
94static struct platform_device warp_nand_device = {
95 .name = "ndfc-chip",
96 .id = 0,
97 .num_resources = 0,
98 .dev = {
99 .platform_data = &warp_nand_chip0,
100 .parent = &warp_ndfc_device.dev,
101 }
102};
103
104static int warp_setup_nand_flash(void)
105{
106 struct device_node *np;
107
108 /* Try to detect a rev A based on NOR size. */
109 np = of_find_compatible_node(NULL, NULL, "cfi-flash");
110 if (np) {
111 struct property *pp;
112
113 pp = of_find_property(np, "reg", NULL);
114 if (pp && (pp->length == 12)) {
115 u32 *v = pp->value;
116 if (v[2] == 0x4000000) {
117 /* Rev A = 64M NAND */
118 warp_nand_chip0.nr_partitions = 3;
119
120 nand_parts[1].size = 0x3000000;
121 nand_parts[2].offset = 0x3200000;
122 nand_parts[2].size = 0x0e00000;
123 }
124 }
125 of_node_put(np);
126 }
127
128 platform_device_register(&warp_ndfc_device);
129 platform_device_register(&warp_nand_device);
130
131 return 0;
132}
133machine_device_initcall(warp, warp_setup_nand_flash);
134
135#endif