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authorMichael Ellerman <mpe@ellerman.id.au>2014-03-14 01:00:31 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-03-23 18:48:26 -0400
commitfb568d763f95d356087b447398382b76592ff915 (patch)
treef1a415e98ab331f18abc69af03b5f56539916f05 /arch/powerpc/perf/power8-pmu.c
parent58b5fb00498ddaaa3f6582751e9eb731189ee4c8 (diff)
powerpc/perf: Clean up the EBB hash defines a little
Rather than using PERF_EVENT_CONFIG_EBB_SHIFT everywhere, add an EVENT_EBB_SHIFT like every other event and use that. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/perf/power8-pmu.c')
-rw-r--r--arch/powerpc/perf/power8-pmu.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 64f04cfabd23..1d7c4428a55e 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -119,6 +119,7 @@
119 */ 119 */
120 120
121#define EVENT_EBB_MASK 1ull 121#define EVENT_EBB_MASK 1ull
122#define EVENT_EBB_SHIFT PERF_EVENT_CONFIG_EBB_SHIFT
122#define EVENT_THR_CMP_SHIFT 40 /* Threshold CMP value */ 123#define EVENT_THR_CMP_SHIFT 40 /* Threshold CMP value */
123#define EVENT_THR_CMP_MASK 0x3ff 124#define EVENT_THR_CMP_MASK 0x3ff
124#define EVENT_THR_CTL_SHIFT 32 /* Threshold control value (start/stop) */ 125#define EVENT_THR_CTL_SHIFT 32 /* Threshold control value (start/stop) */
@@ -151,7 +152,7 @@
151 (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \ 152 (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \
152 (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \ 153 (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \
153 (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \ 154 (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \
154 (EVENT_EBB_MASK << PERF_EVENT_CONFIG_EBB_SHIFT) | \ 155 (EVENT_EBB_MASK << EVENT_EBB_SHIFT) | \
155 EVENT_PSEL_MASK) 156 EVENT_PSEL_MASK)
156 157
157/* MMCRA IFM bits - POWER8 */ 158/* MMCRA IFM bits - POWER8 */
@@ -267,10 +268,10 @@ static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long
267 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; 268 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
268 unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; 269 unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK;
269 cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK; 270 cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK;
270 ebb = (event >> PERF_EVENT_CONFIG_EBB_SHIFT) & EVENT_EBB_MASK; 271 ebb = (event >> EVENT_EBB_SHIFT) & EVENT_EBB_MASK;
271 272
272 /* Clear the EBB bit in the event, so event checks work below */ 273 /* Clear the EBB bit in the event, so event checks work below */
273 event &= ~(EVENT_EBB_MASK << PERF_EVENT_CONFIG_EBB_SHIFT); 274 event &= ~(EVENT_EBB_MASK << EVENT_EBB_SHIFT);
274 275
275 if (pmc) { 276 if (pmc) {
276 if (pmc > 6) 277 if (pmc > 6)