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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-06-07 20:58:58 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-07-14 00:13:51 -0400
commitff82c319e6327b12cd94c5c57754abff243ab3e4 (patch)
tree9545c320549d37f6f9bf99b6ea3eacd6e549706a /arch/powerpc/mm
parent34d97e07cc81ab6f1e63696127cc7a5d2c4fce4b (diff)
powerpc/book3e: Fix single step when using HW page tables
We patch the TLB miss exception vectors to point to alternate functions when using HW page table on BookE. However, we were patching in a new branch in the first instruction of the exception handler instead of the second one, thus overriding the nop that is in the first instruction. This cause problems when single stepping as we rely on that nop for the single step to stop properly within the exception vector range rather than on the target of the branch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/tlb_nohash.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index e81d5d67f834..2ce42bf1f67e 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -391,10 +391,15 @@ static void __early_init_mmu(int boot_cpu)
391 /* Check if HW loader is supported */ 391 /* Check if HW loader is supported */
392 if ((tlb0cfg & TLBnCFG_IND) && 392 if ((tlb0cfg & TLBnCFG_IND) &&
393 (tlb0cfg & TLBnCFG_PT)) { 393 (tlb0cfg & TLBnCFG_PT)) {
394 patch_branch(ibase + (0x1c0 / 4), 394 /* Our exceptions vectors start with a NOP and -then- a branch
395 (unsigned long)&exc_data_tlb_miss_htw_book3e, 0); 395 * to deal with single stepping from userspace which stops on
396 patch_branch(ibase + (0x1e0 / 4), 396 * the second instruction. Thus we need to patch the second
397 (unsigned long)&exc_instruction_tlb_miss_htw_book3e, 0); 397 * instruction of the exception, not the first one
398 */
399 patch_branch(ibase + (0x1c0 / 4) + 1,
400 (unsigned long)&exc_data_tlb_miss_htw_book3e, 0);
401 patch_branch(ibase + (0x1e0 / 4) + 1,
402 (unsigned long)&exc_instruction_tlb_miss_htw_book3e, 0);
398 book3e_htw_enabled = 1; 403 book3e_htw_enabled = 1;
399 } 404 }
400 pr_info("MMU: Book3E Page Tables %s\n", 405 pr_info("MMU: Book3E Page Tables %s\n",