Merge branch 'master'

9 files changed, 43 insertions, 18 deletions

diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 841d8b6323a8..93d4fbfdb724 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -389,5 +389,22 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
         }
 
         /* kernel has accessed a bad area */
+
+        printk(KERN_ALERT "Unable to handle kernel paging request for ");
+        switch (regs->trap) {
+                case 0x300:
+                case 0x380:
+                        printk("data at address 0x%08lx\n", regs->dar);
+                        break;
+                case 0x400:
+                case 0x480:
+                        printk("instruction fetch\n");
+                        break;
+                default:
+                        printk("unknown fault\n");
+        }
+        printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
+                regs->nip);
+
         die("Kernel access of bad area", regs, sig);
 }
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index b2f3dbca6952..22e474876133 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -33,7 +33,6 @@
 #include <linux/init.h>
 #include <linux/signal.h>
 
-#include <asm/ppcdebug.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
 #include <asm/mmu.h>
@@ -329,12 +328,14 @@ static void __init htab_init_page_sizes(void)
          */
         if (mmu_psize_defs[MMU_PAGE_16M].shift)
                 mmu_huge_psize = MMU_PAGE_16M;
+        /* With 4k/4level pagetables, we can't (for now) cope with a
+         * huge page size < PMD_SIZE */
         else if (mmu_psize_defs[MMU_PAGE_1M].shift)
                 mmu_huge_psize = MMU_PAGE_1M;
 
         /* Calculate HPAGE_SHIFT and sanity check it */
-        if (mmu_psize_defs[mmu_huge_psize].shift > 16 &&
-            mmu_psize_defs[mmu_huge_psize].shift < 28)
+        if (mmu_psize_defs[mmu_huge_psize].shift > MIN_HUGEPTE_SHIFT &&
+            mmu_psize_defs[mmu_huge_psize].shift < SID_SHIFT)
                 HPAGE_SHIFT = mmu_psize_defs[mmu_huge_psize].shift;
         else
                 HPAGE_SHIFT = 0; /* No huge pages dude ! */
@@ -407,12 +408,6 @@ void __init htab_initialize(void)
         htab_size_bytes = htab_get_table_size();
         pteg_count = htab_size_bytes >> 7;
 
-        /* For debug, make the HTAB 1/8 as big as it normally would be. */
-        ifppcdebug(PPCDBG_HTABSIZE) {
-                pteg_count >>= 3;
-                htab_size_bytes = pteg_count << 7;
-        }
-
         htab_hash_mask = pteg_count - 1;
 
         if (systemcfg->platform & PLATFORM_LPAR) {
@@ -512,6 +507,9 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap)
 {
         struct page *page;
 
+        if (!pfn_valid(pte_pfn(pte)))
+                return pp;
+
         page = pte_page(pte);
 
         /* page is dirty */
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 0073a04047e4..426c269e552e 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -212,6 +212,12 @@ static int prepare_high_area_for_htlb(struct mm_struct *mm, unsigned long area)
 
         BUG_ON(area >= NUM_HIGH_AREAS);
 
+        /* Hack, so that each addresses is controlled by exactly one
+         * of the high or low area bitmaps, the first high area starts
+         * at 4GB, not 0 */
+        if (start == 0)
+                start = 0x100000000UL;
+
         /* Check no VMAs are in the region */
         vma = find_vma(mm, start);
         if (vma && (vma->vm_start < end))
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index dfe7fa37b41a..ce974c83d88a 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -57,7 +57,6 @@
 #include <asm/processor.h>
 #include <asm/mmzone.h>
 #include <asm/cputable.h>
-#include <asm/ppcdebug.h>
 #include <asm/sections.h>
 #include <asm/system.h>
 #include <asm/iommu.h>
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 7faa46b71f21..6f55efd9be95 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -358,7 +358,7 @@ void __init mem_init(void)
         }
 
         codesize = (unsigned long)&_sdata - (unsigned long)&_stext;
-        datasize = (unsigned long)&__init_begin - (unsigned long)&_sdata;
+        datasize = (unsigned long)&_edata - (unsigned long)&_sdata;
         initsize = (unsigned long)&__init_end - (unsigned long)&__init_begin;
         bsssize = (unsigned long)&__bss_stop - (unsigned long)&__bss_start;
 
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 4035cad8d7f1..da09ba03c424 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -21,6 +21,7 @@
 #include <asm/machdep.h>
 #include <asm/abs_addr.h>
 #include <asm/system.h>
+#include <asm/smp.h>
 
 static int numa_enabled = 1;
 
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 51b786940971..900842451bd3 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -59,7 +59,6 @@
 #include <asm/processor.h>
 #include <asm/mmzone.h>
 #include <asm/cputable.h>
-#include <asm/ppcdebug.h>
 #include <asm/sections.h>
 #include <asm/system.h>
 #include <asm/iommu.h>
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index d137abd241ff..ed7fcfe5fd37 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -188,9 +188,9 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
 
         if (Hash == 0)
                 return;
-        pmd = pmd_offset(pgd_offset(vma->vm_mm, address), address);
+        pmd = pmd_offset(pgd_offset(mm, ea), ea);
         if (!pmd_none(*pmd))
-                add_hash_page(vma->vm_mm->context, address, pmd_val(*pmd));
+                add_hash_page(mm->context, ea, pmd_val(*pmd));
 }
 
 /*
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index 3e18241b6f35..950ffc5848c7 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -80,12 +80,17 @@ _GLOBAL(slb_miss_kernel_load_virtual)
 BEGIN_FTR_SECTION
         b       1f
 END_FTR_SECTION_IFCLR(CPU_FTR_16M_PAGE)
+        cmpldi  r10,16
+
+        lhz     r9,PACALOWHTLBAREAS(r13)
+        mr      r11,r10
+        blt     5f
+
         lhz     r9,PACAHIGHHTLBAREAS(r13)
         srdi    r11,r10,(HTLB_AREA_SHIFT-SID_SHIFT)
-        srd     r9,r9,r11
-        lhz     r11,PACALOWHTLBAREAS(r13)
-        srd     r11,r11,r10
-        or.     r9,r9,r11
+
+5:      srd     r9,r9,r11
+        andi.   r9,r9,1
         beq     1f
 _GLOBAL(slb_miss_user_load_huge)
         li      r11,0