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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-23 20:09:55 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-23 20:09:55 -0500
commit9d3cae26acb471d5954cfdc25d1438b32060babe (patch)
tree77e93b6fb207438f7f1f30a201cc86bc5b0ec82b /arch/powerpc/mm
parentdf24eef3e794afbac69a377d1d2e2e3f5869f67a (diff)
parent8520e443aa56cc157b015205ea53e7b9fc831291 (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Benjamin Herrenschmidt: "So from the depth of frozen Minnesota, here's the powerpc pull request for 3.9. It has a few interesting highlights, in addition to the usual bunch of bug fixes, minor updates, embedded device tree updates and new boards: - Hand tuned asm implementation of SHA1 (by Paulus & Michael Ellerman) - Support for Doorbell interrupts on Power8 (kind of fast thread-thread IPIs) by Ian Munsie - Long overdue cleanup of the way we handle relocation of our open firmware trampoline (prom_init.c) on 64-bit by Anton Blanchard - Support for saving/restoring & context switching the PPR (Processor Priority Register) on server processors that support it. This allows the kernel to preserve thread priorities established by userspace. By Haren Myneni. - DAWR (new watchpoint facility) support on Power8 by Michael Neuling - Ability to change the DSCR (Data Stream Control Register) which controls cache prefetching on a running process via ptrace by Alexey Kardashevskiy - Support for context switching the TAR register on Power8 (new branch target register meant to be used by some new specific userspace perf event interrupt facility which is yet to be enabled) by Ian Munsie. - Improve preservation of the CFAR register (which captures the origin of a branch) on various exception conditions by Paulus. - Move the Bestcomm DMA driver from arch powerpc to drivers/dma where it belongs by Philippe De Muyter - Support for Transactional Memory on Power8 by Michael Neuling (based on original work by Matt Evans). For those curious about the feature, the patch contains a pretty good description." (See commit db8ff907027b: "powerpc: Documentation for transactional memory on powerpc" for the mentioned description added to the file Documentation/powerpc/transactional_memory.txt) * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (140 commits) powerpc/kexec: Disable hard IRQ before kexec powerpc/85xx: l2sram - Add compatible string for BSC9131 platform powerpc/85xx: bsc9131 - Correct typo in SDHC device node powerpc/e500/qemu-e500: enable coreint powerpc/mpic: allow coreint to be determined by MPIC version powerpc/fsl_pci: Store the pci ctlr device ptr in the pci ctlr struct powerpc/85xx: Board support for ppa8548 powerpc/fsl: remove extraneous DIU platform functions arch/powerpc/platforms/85xx/p1022_ds.c: adjust duplicate test powerpc: Documentation for transactional memory on powerpc powerpc: Add transactional memory to pseries and ppc64 defconfigs powerpc: Add config option for transactional memory powerpc: Add transactional memory to POWER8 cpu features powerpc: Add new transactional memory state to the signal context powerpc: Hook in new transactional memory code powerpc: Routines for FP/VSX/VMX unavailable during a transaction powerpc: Add transactional memory unavaliable execption handler powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes powerpc: Add FP/VSX and VMX register load functions for transactional memory powerpc: Add helper functions for transactional memory context switching ...
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/Makefile2
-rw-r--r--arch/powerpc/mm/fault.c4
-rw-r--r--arch/powerpc/mm/hash_utils_64.c16
-rw-r--r--arch/powerpc/mm/mem.c11
4 files changed, 23 insertions, 10 deletions
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 3787b61f7d20..cf16b5733eaa 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -4,7 +4,7 @@
4 4
5subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror 5subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
6 6
7ccflags-$(CONFIG_PPC64) := -mno-minimal-toc 7ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC)
8 8
9obj-y := fault.o mem.o pgtable.o gup.o \ 9obj-y := fault.o mem.o pgtable.o gup.o \
10 init_$(CONFIG_WORD_SIZE).o \ 10 init_$(CONFIG_WORD_SIZE).o \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 3a8489a354e9..229951ffc351 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -249,8 +249,8 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
249#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \ 249#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
250 defined(CONFIG_PPC_BOOK3S_64)) 250 defined(CONFIG_PPC_BOOK3S_64))
251 if (error_code & DSISR_DABRMATCH) { 251 if (error_code & DSISR_DABRMATCH) {
252 /* DABR match */ 252 /* breakpoint match */
253 do_dabr(regs, address, error_code); 253 do_break(regs, address, error_code);
254 return 0; 254 return 0;
255 } 255 }
256#endif 256#endif
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 3a292be2e079..1b6e1271719f 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -55,6 +55,7 @@
55#include <asm/code-patching.h> 55#include <asm/code-patching.h>
56#include <asm/fadump.h> 56#include <asm/fadump.h>
57#include <asm/firmware.h> 57#include <asm/firmware.h>
58#include <asm/tm.h>
58 59
59#ifdef DEBUG 60#ifdef DEBUG
60#define DBG(fmt...) udbg_printf(fmt) 61#define DBG(fmt...) udbg_printf(fmt)
@@ -1171,6 +1172,21 @@ void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize,
1171 DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx); 1172 DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx);
1172 ppc_md.hpte_invalidate(slot, vpn, psize, ssize, local); 1173 ppc_md.hpte_invalidate(slot, vpn, psize, ssize, local);
1173 } pte_iterate_hashed_end(); 1174 } pte_iterate_hashed_end();
1175
1176#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1177 /* Transactions are not aborted by tlbiel, only tlbie.
1178 * Without, syncing a page back to a block device w/ PIO could pick up
1179 * transactional data (bad!) so we force an abort here. Before the
1180 * sync the page will be made read-only, which will flush_hash_page.
1181 * BIG ISSUE here: if the kernel uses a page from userspace without
1182 * unmapping it first, it may see the speculated version.
1183 */
1184 if (local && cpu_has_feature(CPU_FTR_TM) &&
1185 MSR_TM_ACTIVE(current->thread.regs->msr)) {
1186 tm_enable();
1187 tm_abort(TM_CAUSE_TLBI);
1188 }
1189#endif
1174} 1190}
1175 1191
1176void flush_hash_range(unsigned long number, int local) 1192void flush_hash_range(unsigned long number, int local)
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 0dba5066c22a..40df7c8f2096 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -195,13 +195,10 @@ void __init do_init_bootmem(void)
195 min_low_pfn = MEMORY_START >> PAGE_SHIFT; 195 min_low_pfn = MEMORY_START >> PAGE_SHIFT;
196 boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn); 196 boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
197 197
198 /* Add active regions with valid PFNs */ 198 /* Place all memblock_regions in the same node and merge contiguous
199 for_each_memblock(memory, reg) { 199 * memblock_regions
200 unsigned long start_pfn, end_pfn; 200 */
201 start_pfn = memblock_region_memory_base_pfn(reg); 201 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
202 end_pfn = memblock_region_memory_end_pfn(reg);
203 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
204 }
205 202
206 /* Add all physical memory to the bootmem map, mark each area 203 /* Add all physical memory to the bootmem map, mark each area
207 * present. 204 * present.