powerpc/fsl-booke: Add new ISA 2.06 page sizes and MAS defines

The Power ISA 2.06 added power of two page sizes to the embedded MMU
architecture.  Its done it such a way to be code compatiable with the
existing HW.  Made the minor code changes to support both power of two
and power of four page sizes.  Also added some new MAS bits and macros
that are defined as part of the 2.06 ISA.  Renamed some things to use
the 'Book-3e' concept to convey the new MMU that is based on the
Freescale Book-E MMU programming model.

Note, its still invalid to try and use a page size that isn't supported
by cpu.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 3d8cf01582f5..6d38d77ebe25 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -111,7 +111,7 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys,
         unsigned int tsize, lz;
 
         asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
-        tsize = (21 - lz) / 2;
+        tsize = 21 - lz;
 
 #ifdef CONFIG_SMP
         if ((flags & _PAGE_NO_CACHE) == 0)