[PATCH] powerpc: Separate usage of KERNELBASE and PAGE_OFFSET

This patch separates usage of KERNELBASE and PAGE_OFFSET. I haven't
looked at any of the PPC32 code, if we ever want to support Kdump on
PPC we'll have to do another audit, ditto for iSeries.

This patch makes PAGE_OFFSET the constant, it'll always be 0xC * 1
gazillion for 64-bit.

To get a physical address from a virtual one you subtract PAGE_OFFSET,
_not_ KERNELBASE.

KERNELBASE is the virtual address of the start of the kernel, it's
often the same as PAGE_OFFSET, but _might not be_.

If you want to know something's offset from the start of the kernel
you should subtract KERNELBASE.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>

4 files changed, 13 insertions, 13 deletions

diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 846a1894cf95..5bb433cbe41b 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -456,7 +456,7 @@ void __init htab_initialize(void)
 
         /* create bolted the linear mapping in the hash table */
         for (i=0; i < lmb.memory.cnt; i++) {
-                base = lmb.memory.region[i].base + KERNELBASE;
+                base = (unsigned long)__va(lmb.memory.region[i].base);
                 size = lmb.memory.region[i].size;
 
                 DBG("creating mapping for region: %lx : %lx\n", base, size);
@@ -498,8 +498,8 @@ void __init htab_initialize(void)
          * for either 4K or 16MB pages.
          */
         if (tce_alloc_start) {
-                tce_alloc_start += KERNELBASE;
-                tce_alloc_end += KERNELBASE;
+                tce_alloc_start = (unsigned long)__va(tce_alloc_start);
+                tce_alloc_end = (unsigned long)__va(tce_alloc_end);
 
                 if (base + size >= tce_alloc_start)
                         tce_alloc_start = base + size + 1;
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index a47b273600ec..cc22570856af 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -75,7 +75,7 @@ static void slb_flush_and_rebolt(void)
         vflags = SLB_VSID_KERNEL | virtual_llp;
 
         ksp_esid_data = mk_esid_data(get_paca()->kstack, 2);
-        if ((ksp_esid_data & ESID_MASK) == KERNELBASE)
+        if ((ksp_esid_data & ESID_MASK) == PAGE_OFFSET)
                 ksp_esid_data &= ~SLB_ESID_V;
 
         /* We need to do this all in asm, so we're sure we don't touch
@@ -213,7 +213,7 @@ void slb_initialize(void)
         asm volatile("isync":::"memory");
         asm volatile("slbmte  %0,%0"::"r" (0) : "memory");
         asm volatile("isync; slbia; isync":::"memory");
-        create_slbe(KERNELBASE, lflags, 0);
+        create_slbe(PAGE_OFFSET, lflags, 0);
 
         /* VMALLOC space has 4K pages always for now */
         create_slbe(VMALLOCBASE, vflags, 1);
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index 950ffc5848c7..d1acee38f163 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -37,9 +37,9 @@ _GLOBAL(slb_allocate_realmode)
 
         srdi    r9,r3,60                /* get region */
         srdi    r10,r3,28               /* get esid */
-        cmpldi  cr7,r9,0xc              /* cmp KERNELBASE for later use */
+        cmpldi  cr7,r9,0xc              /* cmp PAGE_OFFSET for later use */
 
-        /* r3 = address, r10 = esid, cr7 = <>KERNELBASE */
+        /* r3 = address, r10 = esid, cr7 = <> PAGE_OFFSET */
         blt     cr7,0f                  /* user or kernel? */
 
         /* kernel address: proto-VSID = ESID */
@@ -166,7 +166,7 @@ _GLOBAL(slb_allocate_user)
 /*
  * Finish loading of an SLB entry and return
  *
- * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <>KERNELBASE
+ * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
  */
 slb_finish_load:
         ASM_VSID_SCRAMBLE(r10,r9)
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index a18dab0d6b12..82e4951826bc 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -40,7 +40,7 @@ static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
         unsigned long entry, group, old_esid, castout_entry, i;
         unsigned int global_entry;
         struct stab_entry *ste, *castout_ste;
-        unsigned long kernel_segment = (esid << SID_SHIFT) >= KERNELBASE;
+        unsigned long kernel_segment = (esid << SID_SHIFT) >= PAGE_OFFSET;
 
         vsid_data = vsid << STE_VSID_SHIFT;
         esid_data = esid << SID_SHIFT | STE_ESID_KP | STE_ESID_V;
@@ -83,7 +83,7 @@ static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
                 }
 
                 /* Dont cast out the first kernel segment */
-                if ((castout_ste->esid_data & ESID_MASK) != KERNELBASE)
+                if ((castout_ste->esid_data & ESID_MASK) != PAGE_OFFSET)
                         break;
 
                 castout_entry = (castout_entry + 1) & 0xf;
@@ -251,7 +251,7 @@ void stabs_alloc(void)
                         panic("Unable to allocate segment table for CPU %d.\n",
                               cpu);
 
-                newstab += KERNELBASE;
+                newstab = (unsigned long)__va(newstab);
 
                 memset((void *)newstab, 0, HW_PAGE_SIZE);
 
@@ -270,11 +270,11 @@ void stabs_alloc(void)
  */
 void stab_initialize(unsigned long stab)
 {
-        unsigned long vsid = get_kernel_vsid(KERNELBASE);
+        unsigned long vsid = get_kernel_vsid(PAGE_OFFSET);
         unsigned long stabreal;
 
         asm volatile("isync; slbia; isync":::"memory");
-        make_ste(stab, GET_ESID(KERNELBASE), vsid);
+        make_ste(stab, GET_ESID(PAGE_OFFSET), vsid);
 
         /* Order update */
         asm volatile("sync":::"memory");