[POWERPC] Introduce address space "slices"

The basic issue is to be able to do what hugetlbfs does but with
different page sizes for some other special filesystems; more
specifically, my need is:

 - Huge pages

 - SPE local store mappings using 64K pages on a 4K base page size
kernel on Cell

 - Some special 4K segments in 64K-page kernels for mapping a dodgy
type of powerpc-specific infiniband hardware that requires 4K MMU
mappings for various reasons I won't explain here.

The main issues are:

 - To maintain/keep track of the page size per "segment" (as we can
only have one page size per segment on powerpc, which are 256MB
divisions of the address space).

 - To make sure special mappings stay within their allotted
"segments" (including MAP_FIXED crap)

 - To make sure everybody else doesn't mmap/brk/grow_stack into a
"segment" that is used for a special mapping

Some of the necessary mechanisms to handle that were present in the
hugetlbfs code, but mostly in ways not suitable for anything else.

The patch relies on some changes to the generic get_unmapped_area()
that just got merged.  It still hijacks hugetlb callbacks here or
there as the generic code hasn't been entirely cleaned up yet but
that shouldn't be a problem.

So what is a slice ?  Well, I re-used the mechanism used formerly by our
hugetlbfs implementation which divides the address space in
"meta-segments" which I called "slices".  The division is done using
256MB slices below 4G, and 1T slices above.  Thus the address space is
divided currently into 16 "low" slices and 16 "high" slices.  (Special
case: high slice 0 is the area between 4G and 1T).

Doing so simplifies significantly the tracking of segments and avoids
having to keep track of all the 256MB segments in the address space.

While I used the "concepts" of hugetlbfs, I mostly re-implemented
everything in a more generic way and "ported" hugetlbfs to it.

Slices can have an associated page size, which is encoded in the mmu
context and used by the SLB miss handler to set the segment sizes.  The
hash code currently doesn't care, it has a specific check for hugepages,
though I might add a mechanism to provide per-slice hash mapping
functions in the future.

The slice code provide a pair of "generic" get_unmapped_area() (bottomup
and topdown) functions that should work with any slice size.  There is
some trickiness here so I would appreciate people to have a look at the
implementation of these and let me know if I got something wrong.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 33 insertions, 19 deletions

diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index b10e4707d7c1..cd1a93d4948c 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -82,31 +82,45 @@ _GLOBAL(slb_miss_kernel_load_io)
         srdi.   r9,r10,USER_ESID_BITS
         bne-    8f                      /* invalid ea bits set */
 
-        /* Figure out if the segment contains huge pages */
-#ifdef CONFIG_HUGETLB_PAGE
-BEGIN_FTR_SECTION
-        b       1f
-END_FTR_SECTION_IFCLR(CPU_FTR_16M_PAGE)
+
+        /* when using slices, we extract the psize off the slice bitmaps
+         * and then we need to get the sllp encoding off the mmu_psize_defs
+         * array.
+         *
+         * XXX This is a bit inefficient especially for the normal case,
+         * so we should try to implement a fast path for the standard page
+         * size using the old sllp value so we avoid the array. We cannot
+         * really do dynamic patching unfortunately as processes might flip
+         * between 4k and 64k standard page size
+         */
+#ifdef CONFIG_PPC_MM_SLICES
         cmpldi  r10,16
 
-        lhz     r9,PACALOWHTLBAREAS(r13)
-        mr      r11,r10
+        /* Get the slice index * 4 in r11 and matching slice size mask in r9 */
+        ld      r9,PACALOWSLICESPSIZE(r13)
+        sldi    r11,r10,2
         blt     5f
+        ld      r9,PACAHIGHSLICEPSIZE(r13)
+        srdi    r11,r10,(SLICE_HIGH_SHIFT - SLICE_LOW_SHIFT - 2)
+        andi.   r11,r11,0x3c
 
-        lhz     r9,PACAHIGHHTLBAREAS(r13)
-        srdi    r11,r10,(HTLB_AREA_SHIFT-SID_SHIFT)
-
-5:      srd     r9,r9,r11
-        andi.   r9,r9,1
-        beq     1f
-_GLOBAL(slb_miss_user_load_huge)
-        li      r11,0
-        b       2f
-1:
-#endif /* CONFIG_HUGETLB_PAGE */
+5:      /* Extract the psize and multiply to get an array offset */
+        srd     r9,r9,r11
+        andi.   r9,r9,0xf
+        mulli   r9,r9,MMUPSIZEDEFSIZE
 
+        /* Now get to the array and obtain the sllp
+         */
+        ld      r11,PACATOC(r13)
+        ld      r11,mmu_psize_defs@got(r11)
+        add     r11,r11,r9
+        ld      r11,MMUPSIZESLLP(r11)
+        ori     r11,r11,SLB_VSID_USER
+#else
+        /* paca context sllp already contains the SLB_VSID_USER bits */
         lhz     r11,PACACONTEXTSLLP(r13)
-2:
+#endif /* CONFIG_PPC_MM_SLICES */
+
         ld      r9,PACACONTEXTID(r13)
         rldimi  r10,r9,USER_ESID_BITS,0
         b       slb_finish_load