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authorStephen Rothwell <sfr@canb.auug.org.au>2006-09-25 04:19:00 -0400
committerStephen Rothwell <sfr@canb.auug.org.au>2006-10-03 02:50:21 -0400
commit3f639ee8c52c187d8c95db430ac6f485bffbe5af (patch)
tree26299497413aba786f962960c4a3cf83aa81f42b /arch/powerpc/mm/slb_low.S
parentfc246c389db7b08b4a054e68c742c6598b02523c (diff)
[POWERPC] implement BEGIN/END_FW_FTR_SECTION
and use it an all the obvious places in assembler code. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/powerpc/mm/slb_low.S')
-rw-r--r--arch/powerpc/mm/slb_low.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index dbc1abbde038..b10e4707d7c1 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -21,6 +21,7 @@
21#include <asm/page.h> 21#include <asm/page.h>
22#include <asm/mmu.h> 22#include <asm/mmu.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/firmware.h>
24 25
25/* void slb_allocate_realmode(unsigned long ea); 26/* void slb_allocate_realmode(unsigned long ea);
26 * 27 *
@@ -183,6 +184,7 @@ slb_finish_load:
183 * dont have any LRU information to help us choose a slot. 184 * dont have any LRU information to help us choose a slot.
184 */ 185 */
185#ifdef CONFIG_PPC_ISERIES 186#ifdef CONFIG_PPC_ISERIES
187BEGIN_FW_FTR_SECTION
186 /* 188 /*
187 * On iSeries, the "bolted" stack segment can be cast out on 189 * On iSeries, the "bolted" stack segment can be cast out on
188 * shared processor switch so we need to check for a miss on 190 * shared processor switch so we need to check for a miss on
@@ -194,6 +196,7 @@ slb_finish_load:
194 li r10,SLB_NUM_BOLTED-1 /* Stack goes in last bolted slot */ 196 li r10,SLB_NUM_BOLTED-1 /* Stack goes in last bolted slot */
195 cmpld r9,r3 197 cmpld r9,r3
196 beq 3f 198 beq 3f
199END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
197#endif /* CONFIG_PPC_ISERIES */ 200#endif /* CONFIG_PPC_ISERIES */
198 201
199 ld r10,PACASTABRR(r13) 202 ld r10,PACASTABRR(r13)