[POWERPC] Remove barriers from the SLB shadow buffer update

After talking to an IBM POWER hypervisor (PHYP) design and development
guy, there seems to be no need for memory barriers when updating the SLB
shadow buffer provided we only update it from the current CPU, which we
do.

Also, these guys see no need in the future for these barriers.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 2 insertions, 4 deletions

diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index ff1811ac6c81..4bee1cfa9dea 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -59,14 +59,12 @@ static inline void slb_shadow_update(unsigned long ea,
 {
         /*
          * Clear the ESID first so the entry is not valid while we are
-         * updating it.
+         * updating it.  No write barriers are needed here, provided
+         * we only update the current CPU's SLB shadow buffer.
          */
         get_slb_shadow()->save_area[entry].esid = 0;
-        smp_wmb();
         get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, flags);
-        smp_wmb();
         get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, entry);
-        smp_wmb();
 }
 
 static inline void slb_shadow_clear(unsigned long entry)