diff options
author | Liu Yu <yu.liu@freescale.com> | 2011-09-05 05:01:22 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-07 00:36:44 -0400 |
commit | d5755e6f3a412f012377e28b655d89eff3311f1c (patch) | |
tree | 5e0cf2e457508c34bee70418d05b3cebcdb9c686 /arch/powerpc/math-emu | |
parent | b430abc4d10537992a5ba38eff6c46b3c9009a19 (diff) |
powerpc/math_emu/efp: No need to round if the result is exact
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/math-emu')
-rw-r--r-- | arch/powerpc/math-emu/math_efp.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c index 10fda0f13a00..96dbbae1a590 100644 --- a/arch/powerpc/math-emu/math_efp.c +++ b/arch/powerpc/math-emu/math_efp.c | |||
@@ -676,13 +676,20 @@ int speround_handler(struct pt_regs *regs) | |||
676 | type = insn_type(speinsn & 0x7ff); | 676 | type = insn_type(speinsn & 0x7ff); |
677 | if (type == XCR) return -ENOSYS; | 677 | if (type == XCR) return -ENOSYS; |
678 | 678 | ||
679 | __FPU_FPSCR = mfspr(SPRN_SPEFSCR); | ||
680 | pr_debug("speinsn:%08lx spefscr:%08lx\n", speinsn, __FPU_FPSCR); | ||
681 | |||
682 | /* No need to round if the result is exact */ | ||
683 | if (!(__FPU_FPSCR & FP_EX_INEXACT)) | ||
684 | return 0; | ||
685 | |||
679 | fc = (speinsn >> 21) & 0x1f; | 686 | fc = (speinsn >> 21) & 0x1f; |
680 | s_lo = regs->gpr[fc] & SIGN_BIT_S; | 687 | s_lo = regs->gpr[fc] & SIGN_BIT_S; |
681 | s_hi = current->thread.evr[fc] & SIGN_BIT_S; | 688 | s_hi = current->thread.evr[fc] & SIGN_BIT_S; |
682 | fgpr.wp[0] = current->thread.evr[fc]; | 689 | fgpr.wp[0] = current->thread.evr[fc]; |
683 | fgpr.wp[1] = regs->gpr[fc]; | 690 | fgpr.wp[1] = regs->gpr[fc]; |
684 | 691 | ||
685 | __FPU_FPSCR = mfspr(SPRN_SPEFSCR); | 692 | pr_debug("round fgpr: %08x %08x\n", fgpr.wp[0], fgpr.wp[1]); |
686 | 693 | ||
687 | switch ((speinsn >> 5) & 0x7) { | 694 | switch ((speinsn >> 5) & 0x7) { |
688 | /* Since SPE instructions on E500 core can handle round to nearest | 695 | /* Since SPE instructions on E500 core can handle round to nearest |
@@ -722,6 +729,8 @@ int speround_handler(struct pt_regs *regs) | |||
722 | current->thread.evr[fc] = fgpr.wp[0]; | 729 | current->thread.evr[fc] = fgpr.wp[0]; |
723 | regs->gpr[fc] = fgpr.wp[1]; | 730 | regs->gpr[fc] = fgpr.wp[1]; |
724 | 731 | ||
732 | pr_debug(" to fgpr: %08x %08x\n", fgpr.wp[0], fgpr.wp[1]); | ||
733 | |||
725 | return 0; | 734 | return 0; |
726 | } | 735 | } |
727 | 736 | ||