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authorMichael Neuling <mikey@neuling.org>2008-06-26 03:07:48 -0400
committerPaul Mackerras <paulus@samba.org>2008-06-30 21:28:43 -0400
commit9c75a31c3525a127f70b919856e32be3d8b03755 (patch)
tree3beee76d3dd4a55af868b5edfbef80c911819fed /arch/powerpc/math-emu/math.c
parent9e7511861c4f8d35852a3721c5bcd92661cb4c9f (diff)
powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/math-emu/math.c')
-rw-r--r--arch/powerpc/math-emu/math.c56
1 files changed, 28 insertions, 28 deletions
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index 381306bb1590..29e545e0272e 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -230,14 +230,14 @@ do_mathemu(struct pt_regs *regs)
230 case LFD: 230 case LFD:
231 idx = (insn >> 16) & 0x1f; 231 idx = (insn >> 16) & 0x1f;
232 sdisp = (insn & 0xffff); 232 sdisp = (insn & 0xffff);
233 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 233 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
234 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 234 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
235 lfd(op0, op1, op2, op3); 235 lfd(op0, op1, op2, op3);
236 break; 236 break;
237 case LFDU: 237 case LFDU:
238 idx = (insn >> 16) & 0x1f; 238 idx = (insn >> 16) & 0x1f;
239 sdisp = (insn & 0xffff); 239 sdisp = (insn & 0xffff);
240 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 240 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
241 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 241 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
242 lfd(op0, op1, op2, op3); 242 lfd(op0, op1, op2, op3);
243 regs->gpr[idx] = (unsigned long)op1; 243 regs->gpr[idx] = (unsigned long)op1;
@@ -245,21 +245,21 @@ do_mathemu(struct pt_regs *regs)
245 case STFD: 245 case STFD:
246 idx = (insn >> 16) & 0x1f; 246 idx = (insn >> 16) & 0x1f;
247 sdisp = (insn & 0xffff); 247 sdisp = (insn & 0xffff);
248 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 248 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
249 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 249 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
250 stfd(op0, op1, op2, op3); 250 stfd(op0, op1, op2, op3);
251 break; 251 break;
252 case STFDU: 252 case STFDU:
253 idx = (insn >> 16) & 0x1f; 253 idx = (insn >> 16) & 0x1f;
254 sdisp = (insn & 0xffff); 254 sdisp = (insn & 0xffff);
255 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 255 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
256 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 256 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
257 stfd(op0, op1, op2, op3); 257 stfd(op0, op1, op2, op3);
258 regs->gpr[idx] = (unsigned long)op1; 258 regs->gpr[idx] = (unsigned long)op1;
259 break; 259 break;
260 case OP63: 260 case OP63:
261 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 261 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
262 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 262 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
263 fmr(op0, op1, op2, op3); 263 fmr(op0, op1, op2, op3);
264 break; 264 break;
265 default: 265 default:
@@ -356,28 +356,28 @@ do_mathemu(struct pt_regs *regs)
356 356
357 switch (type) { 357 switch (type) {
358 case AB: 358 case AB:
359 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 359 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
360 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 360 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
361 op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 361 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
362 break; 362 break;
363 363
364 case AC: 364 case AC:
365 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 365 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
366 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 366 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
367 op2 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f]; 367 op2 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f);
368 break; 368 break;
369 369
370 case ABC: 370 case ABC:
371 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 371 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
372 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 372 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
373 op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 373 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
374 op3 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f]; 374 op3 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f);
375 break; 375 break;
376 376
377 case D: 377 case D:
378 idx = (insn >> 16) & 0x1f; 378 idx = (insn >> 16) & 0x1f;
379 sdisp = (insn & 0xffff); 379 sdisp = (insn & 0xffff);
380 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 380 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
381 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 381 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
382 break; 382 break;
383 383
@@ -387,27 +387,27 @@ do_mathemu(struct pt_regs *regs)
387 goto illegal; 387 goto illegal;
388 388
389 sdisp = (insn & 0xffff); 389 sdisp = (insn & 0xffff);
390 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 390 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
391 op1 = (void *)(regs->gpr[idx] + sdisp); 391 op1 = (void *)(regs->gpr[idx] + sdisp);
392 break; 392 break;
393 393
394 case X: 394 case X:
395 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 395 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
396 break; 396 break;
397 397
398 case XA: 398 case XA:
399 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 399 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
400 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 400 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
401 break; 401 break;
402 402
403 case XB: 403 case XB:
404 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 404 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
405 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 405 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
406 break; 406 break;
407 407
408 case XE: 408 case XE:
409 idx = (insn >> 16) & 0x1f; 409 idx = (insn >> 16) & 0x1f;
410 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 410 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
411 if (!idx) { 411 if (!idx) {
412 if (((insn >> 1) & 0x3ff) == STFIWX) 412 if (((insn >> 1) & 0x3ff) == STFIWX)
413 op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]); 413 op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
@@ -421,7 +421,7 @@ do_mathemu(struct pt_regs *regs)
421 421
422 case XEU: 422 case XEU:
423 idx = (insn >> 16) & 0x1f; 423 idx = (insn >> 16) & 0x1f;
424 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 424 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
425 op1 = (void *)((idx ? regs->gpr[idx] : 0) 425 op1 = (void *)((idx ? regs->gpr[idx] : 0)
426 + regs->gpr[(insn >> 11) & 0x1f]); 426 + regs->gpr[(insn >> 11) & 0x1f]);
427 break; 427 break;
@@ -429,8 +429,8 @@ do_mathemu(struct pt_regs *regs)
429 case XCR: 429 case XCR:
430 op0 = (void *)&regs->ccr; 430 op0 = (void *)&regs->ccr;
431 op1 = (void *)((insn >> 23) & 0x7); 431 op1 = (void *)((insn >> 23) & 0x7);
432 op2 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 432 op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
433 op3 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 433 op3 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
434 break; 434 break;
435 435
436 case XCRL: 436 case XCRL:
@@ -450,7 +450,7 @@ do_mathemu(struct pt_regs *regs)
450 450
451 case XFLB: 451 case XFLB:
452 op0 = (void *)((insn >> 17) & 0xff); 452 op0 = (void *)((insn >> 17) & 0xff);
453 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 453 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
454 break; 454 break;
455 455
456 default: 456 default: