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authorJiri Kosina <jkosina@suse.cz>2014-11-20 08:42:02 -0500
committerJiri Kosina <jkosina@suse.cz>2014-11-20 08:42:02 -0500
commita02001086bbfb4da35d1228bebc2f1b442db455f (patch)
tree62ab47936cef06fd08657ca5b6cd1df98c19be57 /arch/powerpc/lib
parenteff264efeeb0898408e8c9df72d8a32621035bed (diff)
parentfc14f9c1272f62c3e8d01300f52467c0d9af50f9 (diff)
Merge Linus' tree to be be to apply submitted patches to newer code than
current trivial.git base
Diffstat (limited to 'arch/powerpc/lib')
-rw-r--r--arch/powerpc/lib/Makefile2
-rw-r--r--arch/powerpc/lib/copyuser_64.S3
-rw-r--r--arch/powerpc/lib/feature-fixups.c2
-rw-r--r--arch/powerpc/lib/locks.c4
-rw-r--r--arch/powerpc/lib/ppc_ksyms.c39
-rw-r--r--arch/powerpc/lib/sstep.c996
6 files changed, 682 insertions, 364 deletions
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 59fa2de9546d..9f342f134ae4 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -10,7 +10,7 @@ CFLAGS_REMOVE_code-patching.o = -pg
10CFLAGS_REMOVE_feature-fixups.o = -pg 10CFLAGS_REMOVE_feature-fixups.o = -pg
11 11
12obj-y := string.o alloc.o \ 12obj-y := string.o alloc.o \
13 crtsavres.o 13 crtsavres.o ppc_ksyms.o
14obj-$(CONFIG_PPC32) += div64.o copy_32.o 14obj-$(CONFIG_PPC32) += div64.o copy_32.o
15obj-$(CONFIG_HAS_IOMEM) += devres.o 15obj-$(CONFIG_HAS_IOMEM) += devres.o
16 16
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 0860ee46013c..f09899e35991 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -461,8 +461,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
461/* 461/*
462 * Routine to copy a whole page of data, optimized for POWER4. 462 * Routine to copy a whole page of data, optimized for POWER4.
463 * On POWER4 it is more than 50% faster than the simple loop 463 * On POWER4 it is more than 50% faster than the simple loop
464 * above (following the .Ldst_aligned label) but it runs slightly 464 * above (following the .Ldst_aligned label).
465 * slower on POWER3.
466 */ 465 */
467.Lcopy_page_4K: 466.Lcopy_page_4K:
468 std r31,-32(1) 467 std r31,-32(1)
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 7a8a7487cee8..7ce3870d7ddd 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -164,7 +164,7 @@ static long calc_offset(struct fixup_entry *entry, unsigned int *p)
164 return (unsigned long)p - (unsigned long)entry; 164 return (unsigned long)p - (unsigned long)entry;
165} 165}
166 166
167void test_basic_patching(void) 167static void test_basic_patching(void)
168{ 168{
169 extern unsigned int ftr_fixup_test1; 169 extern unsigned int ftr_fixup_test1;
170 extern unsigned int end_ftr_fixup_test1; 170 extern unsigned int end_ftr_fixup_test1;
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index 0c9c8d7d0734..170a0346f756 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -70,12 +70,16 @@ void __rw_yield(arch_rwlock_t *rw)
70 70
71void arch_spin_unlock_wait(arch_spinlock_t *lock) 71void arch_spin_unlock_wait(arch_spinlock_t *lock)
72{ 72{
73 smp_mb();
74
73 while (lock->slock) { 75 while (lock->slock) {
74 HMT_low(); 76 HMT_low();
75 if (SHARED_PROCESSOR) 77 if (SHARED_PROCESSOR)
76 __spin_yield(lock); 78 __spin_yield(lock);
77 } 79 }
78 HMT_medium(); 80 HMT_medium();
81
82 smp_mb();
79} 83}
80 84
81EXPORT_SYMBOL(arch_spin_unlock_wait); 85EXPORT_SYMBOL(arch_spin_unlock_wait);
diff --git a/arch/powerpc/lib/ppc_ksyms.c b/arch/powerpc/lib/ppc_ksyms.c
new file mode 100644
index 000000000000..f993959647b5
--- /dev/null
+++ b/arch/powerpc/lib/ppc_ksyms.c
@@ -0,0 +1,39 @@
1#include <linux/string.h>
2#include <linux/uaccess.h>
3#include <linux/bitops.h>
4#include <net/checksum.h>
5
6EXPORT_SYMBOL(memcpy);
7EXPORT_SYMBOL(memset);
8EXPORT_SYMBOL(memmove);
9EXPORT_SYMBOL(memcmp);
10EXPORT_SYMBOL(memchr);
11#ifdef CONFIG_PPC32
12EXPORT_SYMBOL(cacheable_memcpy);
13EXPORT_SYMBOL(cacheable_memzero);
14#endif
15
16EXPORT_SYMBOL(strcpy);
17EXPORT_SYMBOL(strncpy);
18EXPORT_SYMBOL(strcat);
19EXPORT_SYMBOL(strlen);
20EXPORT_SYMBOL(strcmp);
21EXPORT_SYMBOL(strncmp);
22
23#ifndef CONFIG_GENERIC_CSUM
24EXPORT_SYMBOL(csum_partial);
25EXPORT_SYMBOL(csum_partial_copy_generic);
26EXPORT_SYMBOL(ip_fast_csum);
27EXPORT_SYMBOL(csum_tcpudp_magic);
28#endif
29
30EXPORT_SYMBOL(__copy_tofrom_user);
31EXPORT_SYMBOL(__clear_user);
32EXPORT_SYMBOL(copy_page);
33
34#ifdef CONFIG_PPC64
35EXPORT_SYMBOL(__arch_hweight8);
36EXPORT_SYMBOL(__arch_hweight16);
37EXPORT_SYMBOL(__arch_hweight32);
38EXPORT_SYMBOL(__arch_hweight64);
39#endif
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 5c09f365c842..54651fc2d412 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -98,13 +98,8 @@ static unsigned long __kprobes dform_ea(unsigned int instr, struct pt_regs *regs
98 98
99 ra = (instr >> 16) & 0x1f; 99 ra = (instr >> 16) & 0x1f;
100 ea = (signed short) instr; /* sign-extend */ 100 ea = (signed short) instr; /* sign-extend */
101 if (ra) { 101 if (ra)
102 ea += regs->gpr[ra]; 102 ea += regs->gpr[ra];
103 if (instr & 0x04000000) { /* update forms */
104 if ((instr>>26) != 47) /* stmw is not an update form */
105 regs->gpr[ra] = ea;
106 }
107 }
108 103
109 return truncate_if_32bit(regs->msr, ea); 104 return truncate_if_32bit(regs->msr, ea);
110} 105}
@@ -120,11 +115,8 @@ static unsigned long __kprobes dsform_ea(unsigned int instr, struct pt_regs *reg
120 115
121 ra = (instr >> 16) & 0x1f; 116 ra = (instr >> 16) & 0x1f;
122 ea = (signed short) (instr & ~3); /* sign-extend */ 117 ea = (signed short) (instr & ~3); /* sign-extend */
123 if (ra) { 118 if (ra)
124 ea += regs->gpr[ra]; 119 ea += regs->gpr[ra];
125 if ((instr & 3) == 1) /* update forms */
126 regs->gpr[ra] = ea;
127 }
128 120
129 return truncate_if_32bit(regs->msr, ea); 121 return truncate_if_32bit(regs->msr, ea);
130} 122}
@@ -133,8 +125,8 @@ static unsigned long __kprobes dsform_ea(unsigned int instr, struct pt_regs *reg
133/* 125/*
134 * Calculate effective address for an X-form instruction 126 * Calculate effective address for an X-form instruction
135 */ 127 */
136static unsigned long __kprobes xform_ea(unsigned int instr, struct pt_regs *regs, 128static unsigned long __kprobes xform_ea(unsigned int instr,
137 int do_update) 129 struct pt_regs *regs)
138{ 130{
139 int ra, rb; 131 int ra, rb;
140 unsigned long ea; 132 unsigned long ea;
@@ -142,11 +134,8 @@ static unsigned long __kprobes xform_ea(unsigned int instr, struct pt_regs *regs
142 ra = (instr >> 16) & 0x1f; 134 ra = (instr >> 16) & 0x1f;
143 rb = (instr >> 11) & 0x1f; 135 rb = (instr >> 11) & 0x1f;
144 ea = regs->gpr[rb]; 136 ea = regs->gpr[rb];
145 if (ra) { 137 if (ra)
146 ea += regs->gpr[ra]; 138 ea += regs->gpr[ra];
147 if (do_update) /* update forms */
148 regs->gpr[ra] = ea;
149 }
150 139
151 return truncate_if_32bit(regs->msr, ea); 140 return truncate_if_32bit(regs->msr, ea);
152} 141}
@@ -611,6 +600,23 @@ static void __kprobes do_cmp_unsigned(struct pt_regs *regs, unsigned long v1,
611 regs->ccr = (regs->ccr & ~(0xf << shift)) | (crval << shift); 600 regs->ccr = (regs->ccr & ~(0xf << shift)) | (crval << shift);
612} 601}
613 602
603static int __kprobes trap_compare(long v1, long v2)
604{
605 int ret = 0;
606
607 if (v1 < v2)
608 ret |= 0x10;
609 else if (v1 > v2)
610 ret |= 0x08;
611 else
612 ret |= 0x04;
613 if ((unsigned long)v1 < (unsigned long)v2)
614 ret |= 0x02;
615 else if ((unsigned long)v1 > (unsigned long)v2)
616 ret |= 0x01;
617 return ret;
618}
619
614/* 620/*
615 * Elements of 32-bit rotate and mask instructions. 621 * Elements of 32-bit rotate and mask instructions.
616 */ 622 */
@@ -627,26 +633,27 @@ static void __kprobes do_cmp_unsigned(struct pt_regs *regs, unsigned long v1,
627#define ROTATE(x, n) ((n) ? (((x) << (n)) | ((x) >> (8 * sizeof(long) - (n)))) : (x)) 633#define ROTATE(x, n) ((n) ? (((x) << (n)) | ((x) >> (8 * sizeof(long) - (n)))) : (x))
628 634
629/* 635/*
630 * Emulate instructions that cause a transfer of control, 636 * Decode an instruction, and execute it if that can be done just by
631 * loads and stores, and a few other instructions. 637 * modifying *regs (i.e. integer arithmetic and logical instructions,
632 * Returns 1 if the step was emulated, 0 if not, 638 * branches, and barrier instructions).
633 * or -1 if the instruction is one that should not be stepped, 639 * Returns 1 if the instruction has been executed, or 0 if not.
634 * such as an rfid, or a mtmsrd that would clear MSR_RI. 640 * Sets *op to indicate what the instruction does.
635 */ 641 */
636int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) 642int __kprobes analyse_instr(struct instruction_op *op, struct pt_regs *regs,
643 unsigned int instr)
637{ 644{
638 unsigned int opcode, ra, rb, rd, spr, u; 645 unsigned int opcode, ra, rb, rd, spr, u;
639 unsigned long int imm; 646 unsigned long int imm;
640 unsigned long int val, val2; 647 unsigned long int val, val2;
641 unsigned long int ea; 648 unsigned int mb, me, sh;
642 unsigned int cr, mb, me, sh;
643 int err;
644 unsigned long old_ra, val3;
645 long ival; 649 long ival;
646 650
651 op->type = COMPUTE;
652
647 opcode = instr >> 26; 653 opcode = instr >> 26;
648 switch (opcode) { 654 switch (opcode) {
649 case 16: /* bc */ 655 case 16: /* bc */
656 op->type = BRANCH;
650 imm = (signed short)(instr & 0xfffc); 657 imm = (signed short)(instr & 0xfffc);
651 if ((instr & 2) == 0) 658 if ((instr & 2) == 0)
652 imm += regs->nip; 659 imm += regs->nip;
@@ -659,26 +666,14 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
659 return 1; 666 return 1;
660#ifdef CONFIG_PPC64 667#ifdef CONFIG_PPC64
661 case 17: /* sc */ 668 case 17: /* sc */
662 /* 669 if ((instr & 0xfe2) == 2)
663 * N.B. this uses knowledge about how the syscall 670 op->type = SYSCALL;
664 * entry code works. If that is changed, this will 671 else
665 * need to be changed also. 672 op->type = UNKNOWN;
666 */ 673 return 0;
667 if (regs->gpr[0] == 0x1ebe &&
668 cpu_has_feature(CPU_FTR_REAL_LE)) {
669 regs->msr ^= MSR_LE;
670 goto instr_done;
671 }
672 regs->gpr[9] = regs->gpr[13];
673 regs->gpr[10] = MSR_KERNEL;
674 regs->gpr[11] = regs->nip + 4;
675 regs->gpr[12] = regs->msr & MSR_MASK;
676 regs->gpr[13] = (unsigned long) get_paca();
677 regs->nip = (unsigned long) &system_call_common;
678 regs->msr = MSR_KERNEL;
679 return 1;
680#endif 674#endif
681 case 18: /* b */ 675 case 18: /* b */
676 op->type = BRANCH;
682 imm = instr & 0x03fffffc; 677 imm = instr & 0x03fffffc;
683 if (imm & 0x02000000) 678 if (imm & 0x02000000)
684 imm -= 0x04000000; 679 imm -= 0x04000000;
@@ -691,8 +686,16 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
691 return 1; 686 return 1;
692 case 19: 687 case 19:
693 switch ((instr >> 1) & 0x3ff) { 688 switch ((instr >> 1) & 0x3ff) {
689 case 0: /* mcrf */
690 rd = (instr >> 21) & 0x1c;
691 ra = (instr >> 16) & 0x1c;
692 val = (regs->ccr >> ra) & 0xf;
693 regs->ccr = (regs->ccr & ~(0xfUL << rd)) | (val << rd);
694 goto instr_done;
695
694 case 16: /* bclr */ 696 case 16: /* bclr */
695 case 528: /* bcctr */ 697 case 528: /* bcctr */
698 op->type = BRANCH;
696 imm = (instr & 0x400)? regs->ctr: regs->link; 699 imm = (instr & 0x400)? regs->ctr: regs->link;
697 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4); 700 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
698 imm = truncate_if_32bit(regs->msr, imm); 701 imm = truncate_if_32bit(regs->msr, imm);
@@ -703,9 +706,13 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
703 return 1; 706 return 1;
704 707
705 case 18: /* rfid, scary */ 708 case 18: /* rfid, scary */
706 return -1; 709 if (regs->msr & MSR_PR)
710 goto priv;
711 op->type = RFI;
712 return 0;
707 713
708 case 150: /* isync */ 714 case 150: /* isync */
715 op->type = BARRIER;
709 isync(); 716 isync();
710 goto instr_done; 717 goto instr_done;
711 718
@@ -731,6 +738,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
731 case 31: 738 case 31:
732 switch ((instr >> 1) & 0x3ff) { 739 switch ((instr >> 1) & 0x3ff) {
733 case 598: /* sync */ 740 case 598: /* sync */
741 op->type = BARRIER;
734#ifdef __powerpc64__ 742#ifdef __powerpc64__
735 switch ((instr >> 21) & 3) { 743 switch ((instr >> 21) & 3) {
736 case 1: /* lwsync */ 744 case 1: /* lwsync */
@@ -745,6 +753,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
745 goto instr_done; 753 goto instr_done;
746 754
747 case 854: /* eieio */ 755 case 854: /* eieio */
756 op->type = BARRIER;
748 eieio(); 757 eieio();
749 goto instr_done; 758 goto instr_done;
750 } 759 }
@@ -760,6 +769,17 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
760 rb = (instr >> 11) & 0x1f; 769 rb = (instr >> 11) & 0x1f;
761 770
762 switch (opcode) { 771 switch (opcode) {
772#ifdef __powerpc64__
773 case 2: /* tdi */
774 if (rd & trap_compare(regs->gpr[ra], (short) instr))
775 goto trap;
776 goto instr_done;
777#endif
778 case 3: /* twi */
779 if (rd & trap_compare((int)regs->gpr[ra], (short) instr))
780 goto trap;
781 goto instr_done;
782
763 case 7: /* mulli */ 783 case 7: /* mulli */
764 regs->gpr[rd] = regs->gpr[ra] * (short) instr; 784 regs->gpr[rd] = regs->gpr[ra] * (short) instr;
765 goto instr_done; 785 goto instr_done;
@@ -908,35 +928,44 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
908 928
909 case 31: 929 case 31:
910 switch ((instr >> 1) & 0x3ff) { 930 switch ((instr >> 1) & 0x3ff) {
931 case 4: /* tw */
932 if (rd == 0x1f ||
933 (rd & trap_compare((int)regs->gpr[ra],
934 (int)regs->gpr[rb])))
935 goto trap;
936 goto instr_done;
937#ifdef __powerpc64__
938 case 68: /* td */
939 if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb]))
940 goto trap;
941 goto instr_done;
942#endif
911 case 83: /* mfmsr */ 943 case 83: /* mfmsr */
912 if (regs->msr & MSR_PR) 944 if (regs->msr & MSR_PR)
913 break; 945 goto priv;
914 regs->gpr[rd] = regs->msr & MSR_MASK; 946 op->type = MFMSR;
915 goto instr_done; 947 op->reg = rd;
948 return 0;
916 case 146: /* mtmsr */ 949 case 146: /* mtmsr */
917 if (regs->msr & MSR_PR) 950 if (regs->msr & MSR_PR)
918 break; 951 goto priv;
919 imm = regs->gpr[rd]; 952 op->type = MTMSR;
920 if ((imm & MSR_RI) == 0) 953 op->reg = rd;
921 /* can't step mtmsr that would clear MSR_RI */ 954 op->val = 0xffffffff & ~(MSR_ME | MSR_LE);
922 return -1; 955 return 0;
923 regs->msr = imm;
924 goto instr_done;
925#ifdef CONFIG_PPC64 956#ifdef CONFIG_PPC64
926 case 178: /* mtmsrd */ 957 case 178: /* mtmsrd */
927 /* only MSR_EE and MSR_RI get changed if bit 15 set */
928 /* mtmsrd doesn't change MSR_HV and MSR_ME */
929 if (regs->msr & MSR_PR) 958 if (regs->msr & MSR_PR)
930 break; 959 goto priv;
931 imm = (instr & 0x10000)? 0x8002: 0xefffffffffffefffUL; 960 op->type = MTMSR;
932 imm = (regs->msr & MSR_MASK & ~imm) 961 op->reg = rd;
933 | (regs->gpr[rd] & imm); 962 /* only MSR_EE and MSR_RI get changed if bit 15 set */
934 if ((imm & MSR_RI) == 0) 963 /* mtmsrd doesn't change MSR_HV, MSR_ME or MSR_LE */
935 /* can't step mtmsrd that would clear MSR_RI */ 964 imm = (instr & 0x10000)? 0x8002: 0xefffffffffffeffeUL;
936 return -1; 965 op->val = imm;
937 regs->msr = imm; 966 return 0;
938 goto instr_done;
939#endif 967#endif
968
940 case 19: /* mfcr */ 969 case 19: /* mfcr */
941 regs->gpr[rd] = regs->ccr; 970 regs->gpr[rd] = regs->ccr;
942 regs->gpr[rd] &= 0xffffffffUL; 971 regs->gpr[rd] &= 0xffffffffUL;
@@ -954,33 +983,43 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
954 goto instr_done; 983 goto instr_done;
955 984
956 case 339: /* mfspr */ 985 case 339: /* mfspr */
957 spr = (instr >> 11) & 0x3ff; 986 spr = ((instr >> 16) & 0x1f) | ((instr >> 6) & 0x3e0);
958 switch (spr) { 987 switch (spr) {
959 case 0x20: /* mfxer */ 988 case SPRN_XER: /* mfxer */
960 regs->gpr[rd] = regs->xer; 989 regs->gpr[rd] = regs->xer;
961 regs->gpr[rd] &= 0xffffffffUL; 990 regs->gpr[rd] &= 0xffffffffUL;
962 goto instr_done; 991 goto instr_done;
963 case 0x100: /* mflr */ 992 case SPRN_LR: /* mflr */
964 regs->gpr[rd] = regs->link; 993 regs->gpr[rd] = regs->link;
965 goto instr_done; 994 goto instr_done;
966 case 0x120: /* mfctr */ 995 case SPRN_CTR: /* mfctr */
967 regs->gpr[rd] = regs->ctr; 996 regs->gpr[rd] = regs->ctr;
968 goto instr_done; 997 goto instr_done;
998 default:
999 op->type = MFSPR;
1000 op->reg = rd;
1001 op->spr = spr;
1002 return 0;
969 } 1003 }
970 break; 1004 break;
971 1005
972 case 467: /* mtspr */ 1006 case 467: /* mtspr */
973 spr = (instr >> 11) & 0x3ff; 1007 spr = ((instr >> 16) & 0x1f) | ((instr >> 6) & 0x3e0);
974 switch (spr) { 1008 switch (spr) {
975 case 0x20: /* mtxer */ 1009 case SPRN_XER: /* mtxer */
976 regs->xer = (regs->gpr[rd] & 0xffffffffUL); 1010 regs->xer = (regs->gpr[rd] & 0xffffffffUL);
977 goto instr_done; 1011 goto instr_done;
978 case 0x100: /* mtlr */ 1012 case SPRN_LR: /* mtlr */
979 regs->link = regs->gpr[rd]; 1013 regs->link = regs->gpr[rd];
980 goto instr_done; 1014 goto instr_done;
981 case 0x120: /* mtctr */ 1015 case SPRN_CTR: /* mtctr */
982 regs->ctr = regs->gpr[rd]; 1016 regs->ctr = regs->gpr[rd];
983 goto instr_done; 1017 goto instr_done;
1018 default:
1019 op->type = MTSPR;
1020 op->val = regs->gpr[rd];
1021 op->spr = spr;
1022 return 0;
984 } 1023 }
985 break; 1024 break;
986 1025
@@ -1257,294 +1296,242 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1257 * Cache instructions 1296 * Cache instructions
1258 */ 1297 */
1259 case 54: /* dcbst */ 1298 case 54: /* dcbst */
1260 ea = xform_ea(instr, regs, 0); 1299 op->type = MKOP(CACHEOP, DCBST, 0);
1261 if (!address_ok(regs, ea, 8)) 1300 op->ea = xform_ea(instr, regs);
1262 return 0; 1301 return 0;
1263 err = 0;
1264 __cacheop_user_asmx(ea, err, "dcbst");
1265 if (err)
1266 return 0;
1267 goto instr_done;
1268 1302
1269 case 86: /* dcbf */ 1303 case 86: /* dcbf */
1270 ea = xform_ea(instr, regs, 0); 1304 op->type = MKOP(CACHEOP, DCBF, 0);
1271 if (!address_ok(regs, ea, 8)) 1305 op->ea = xform_ea(instr, regs);
1272 return 0; 1306 return 0;
1273 err = 0;
1274 __cacheop_user_asmx(ea, err, "dcbf");
1275 if (err)
1276 return 0;
1277 goto instr_done;
1278 1307
1279 case 246: /* dcbtst */ 1308 case 246: /* dcbtst */
1280 if (rd == 0) { 1309 op->type = MKOP(CACHEOP, DCBTST, 0);
1281 ea = xform_ea(instr, regs, 0); 1310 op->ea = xform_ea(instr, regs);
1282 prefetchw((void *) ea); 1311 op->reg = rd;
1283 } 1312 return 0;
1284 goto instr_done;
1285 1313
1286 case 278: /* dcbt */ 1314 case 278: /* dcbt */
1287 if (rd == 0) { 1315 op->type = MKOP(CACHEOP, DCBTST, 0);
1288 ea = xform_ea(instr, regs, 0); 1316 op->ea = xform_ea(instr, regs);
1289 prefetch((void *) ea); 1317 op->reg = rd;
1290 } 1318 return 0;
1291 goto instr_done;
1292 1319
1320 case 982: /* icbi */
1321 op->type = MKOP(CACHEOP, ICBI, 0);
1322 op->ea = xform_ea(instr, regs);
1323 return 0;
1293 } 1324 }
1294 break; 1325 break;
1295 } 1326 }
1296 1327
1297 /* 1328 /*
1298 * Following cases are for loads and stores, so bail out 1329 * Loads and stores.
1299 * if we're in little-endian mode.
1300 */ 1330 */
1301 if (regs->msr & MSR_LE) 1331 op->type = UNKNOWN;
1302 return 0; 1332 op->update_reg = ra;
1303 1333 op->reg = rd;
1304 /* 1334 op->val = regs->gpr[rd];
1305 * Save register RA in case it's an update form load or store 1335 u = (instr >> 20) & UPDATE;
1306 * and the access faults.
1307 */
1308 old_ra = regs->gpr[ra];
1309 1336
1310 switch (opcode) { 1337 switch (opcode) {
1311 case 31: 1338 case 31:
1312 u = instr & 0x40; 1339 u = instr & UPDATE;
1340 op->ea = xform_ea(instr, regs);
1313 switch ((instr >> 1) & 0x3ff) { 1341 switch ((instr >> 1) & 0x3ff) {
1314 case 20: /* lwarx */ 1342 case 20: /* lwarx */
1315 ea = xform_ea(instr, regs, 0); 1343 op->type = MKOP(LARX, 0, 4);
1316 if (ea & 3) 1344 break;
1317 break; /* can't handle misaligned */
1318 err = -EFAULT;
1319 if (!address_ok(regs, ea, 4))
1320 goto ldst_done;
1321 err = 0;
1322 __get_user_asmx(val, ea, err, "lwarx");
1323 if (!err)
1324 regs->gpr[rd] = val;
1325 goto ldst_done;
1326 1345
1327 case 150: /* stwcx. */ 1346 case 150: /* stwcx. */
1328 ea = xform_ea(instr, regs, 0); 1347 op->type = MKOP(STCX, 0, 4);
1329 if (ea & 3) 1348 break;
1330 break; /* can't handle misaligned */
1331 err = -EFAULT;
1332 if (!address_ok(regs, ea, 4))
1333 goto ldst_done;
1334 err = 0;
1335 __put_user_asmx(regs->gpr[rd], ea, err, "stwcx.", cr);
1336 if (!err)
1337 regs->ccr = (regs->ccr & 0x0fffffff) |
1338 (cr & 0xe0000000) |
1339 ((regs->xer >> 3) & 0x10000000);
1340 goto ldst_done;
1341 1349
1342#ifdef __powerpc64__ 1350#ifdef __powerpc64__
1343 case 84: /* ldarx */ 1351 case 84: /* ldarx */
1344 ea = xform_ea(instr, regs, 0); 1352 op->type = MKOP(LARX, 0, 8);
1345 if (ea & 7) 1353 break;
1346 break; /* can't handle misaligned */
1347 err = -EFAULT;
1348 if (!address_ok(regs, ea, 8))
1349 goto ldst_done;
1350 err = 0;
1351 __get_user_asmx(val, ea, err, "ldarx");
1352 if (!err)
1353 regs->gpr[rd] = val;
1354 goto ldst_done;
1355 1354
1356 case 214: /* stdcx. */ 1355 case 214: /* stdcx. */
1357 ea = xform_ea(instr, regs, 0); 1356 op->type = MKOP(STCX, 0, 8);
1358 if (ea & 7) 1357 break;
1359 break; /* can't handle misaligned */
1360 err = -EFAULT;
1361 if (!address_ok(regs, ea, 8))
1362 goto ldst_done;
1363 err = 0;
1364 __put_user_asmx(regs->gpr[rd], ea, err, "stdcx.", cr);
1365 if (!err)
1366 regs->ccr = (regs->ccr & 0x0fffffff) |
1367 (cr & 0xe0000000) |
1368 ((regs->xer >> 3) & 0x10000000);
1369 goto ldst_done;
1370 1358
1371 case 21: /* ldx */ 1359 case 21: /* ldx */
1372 case 53: /* ldux */ 1360 case 53: /* ldux */
1373 err = read_mem(&regs->gpr[rd], xform_ea(instr, regs, u), 1361 op->type = MKOP(LOAD, u, 8);
1374 8, regs); 1362 break;
1375 goto ldst_done;
1376#endif 1363#endif
1377 1364
1378 case 23: /* lwzx */ 1365 case 23: /* lwzx */
1379 case 55: /* lwzux */ 1366 case 55: /* lwzux */
1380 err = read_mem(&regs->gpr[rd], xform_ea(instr, regs, u), 1367 op->type = MKOP(LOAD, u, 4);
1381 4, regs); 1368 break;
1382 goto ldst_done;
1383 1369
1384 case 87: /* lbzx */ 1370 case 87: /* lbzx */
1385 case 119: /* lbzux */ 1371 case 119: /* lbzux */
1386 err = read_mem(&regs->gpr[rd], xform_ea(instr, regs, u), 1372 op->type = MKOP(LOAD, u, 1);
1387 1, regs); 1373 break;
1388 goto ldst_done;
1389 1374
1390#ifdef CONFIG_ALTIVEC 1375#ifdef CONFIG_ALTIVEC
1391 case 103: /* lvx */ 1376 case 103: /* lvx */
1392 case 359: /* lvxl */ 1377 case 359: /* lvxl */
1393 if (!(regs->msr & MSR_VEC)) 1378 if (!(regs->msr & MSR_VEC))
1394 break; 1379 goto vecunavail;
1395 ea = xform_ea(instr, regs, 0); 1380 op->type = MKOP(LOAD_VMX, 0, 16);
1396 err = do_vec_load(rd, do_lvx, ea, regs); 1381 break;
1397 goto ldst_done;
1398 1382
1399 case 231: /* stvx */ 1383 case 231: /* stvx */
1400 case 487: /* stvxl */ 1384 case 487: /* stvxl */
1401 if (!(regs->msr & MSR_VEC)) 1385 if (!(regs->msr & MSR_VEC))
1402 break; 1386 goto vecunavail;
1403 ea = xform_ea(instr, regs, 0); 1387 op->type = MKOP(STORE_VMX, 0, 16);
1404 err = do_vec_store(rd, do_stvx, ea, regs); 1388 break;
1405 goto ldst_done;
1406#endif /* CONFIG_ALTIVEC */ 1389#endif /* CONFIG_ALTIVEC */
1407 1390
1408#ifdef __powerpc64__ 1391#ifdef __powerpc64__
1409 case 149: /* stdx */ 1392 case 149: /* stdx */
1410 case 181: /* stdux */ 1393 case 181: /* stdux */
1411 val = regs->gpr[rd]; 1394 op->type = MKOP(STORE, u, 8);
1412 err = write_mem(val, xform_ea(instr, regs, u), 8, regs); 1395 break;
1413 goto ldst_done;
1414#endif 1396#endif
1415 1397
1416 case 151: /* stwx */ 1398 case 151: /* stwx */
1417 case 183: /* stwux */ 1399 case 183: /* stwux */
1418 val = regs->gpr[rd]; 1400 op->type = MKOP(STORE, u, 4);
1419 err = write_mem(val, xform_ea(instr, regs, u), 4, regs); 1401 break;
1420 goto ldst_done;
1421 1402
1422 case 215: /* stbx */ 1403 case 215: /* stbx */
1423 case 247: /* stbux */ 1404 case 247: /* stbux */
1424 val = regs->gpr[rd]; 1405 op->type = MKOP(STORE, u, 1);
1425 err = write_mem(val, xform_ea(instr, regs, u), 1, regs); 1406 break;
1426 goto ldst_done;
1427 1407
1428 case 279: /* lhzx */ 1408 case 279: /* lhzx */
1429 case 311: /* lhzux */ 1409 case 311: /* lhzux */
1430 err = read_mem(&regs->gpr[rd], xform_ea(instr, regs, u), 1410 op->type = MKOP(LOAD, u, 2);
1431 2, regs); 1411 break;
1432 goto ldst_done;
1433 1412
1434#ifdef __powerpc64__ 1413#ifdef __powerpc64__
1435 case 341: /* lwax */ 1414 case 341: /* lwax */
1436 case 373: /* lwaux */ 1415 case 373: /* lwaux */
1437 err = read_mem(&regs->gpr[rd], xform_ea(instr, regs, u), 1416 op->type = MKOP(LOAD, SIGNEXT | u, 4);
1438 4, regs); 1417 break;
1439 if (!err)
1440 regs->gpr[rd] = (signed int) regs->gpr[rd];
1441 goto ldst_done;
1442#endif 1418#endif
1443 1419
1444 case 343: /* lhax */ 1420 case 343: /* lhax */
1445 case 375: /* lhaux */ 1421 case 375: /* lhaux */
1446 err = read_mem(&regs->gpr[rd], xform_ea(instr, regs, u), 1422 op->type = MKOP(LOAD, SIGNEXT | u, 2);
1447 2, regs); 1423 break;
1448 if (!err)
1449 regs->gpr[rd] = (signed short) regs->gpr[rd];
1450 goto ldst_done;
1451 1424
1452 case 407: /* sthx */ 1425 case 407: /* sthx */
1453 case 439: /* sthux */ 1426 case 439: /* sthux */
1454 val = regs->gpr[rd]; 1427 op->type = MKOP(STORE, u, 2);
1455 err = write_mem(val, xform_ea(instr, regs, u), 2, regs); 1428 break;
1456 goto ldst_done;
1457 1429
1458#ifdef __powerpc64__ 1430#ifdef __powerpc64__
1459 case 532: /* ldbrx */ 1431 case 532: /* ldbrx */
1460 err = read_mem(&val, xform_ea(instr, regs, 0), 8, regs); 1432 op->type = MKOP(LOAD, BYTEREV, 8);
1461 if (!err) 1433 break;
1462 regs->gpr[rd] = byterev_8(val);
1463 goto ldst_done;
1464 1434
1465#endif 1435#endif
1436 case 533: /* lswx */
1437 op->type = MKOP(LOAD_MULTI, 0, regs->xer & 0x7f);
1438 break;
1466 1439
1467 case 534: /* lwbrx */ 1440 case 534: /* lwbrx */
1468 err = read_mem(&val, xform_ea(instr, regs, 0), 4, regs); 1441 op->type = MKOP(LOAD, BYTEREV, 4);
1469 if (!err) 1442 break;
1470 regs->gpr[rd] = byterev_4(val); 1443
1471 goto ldst_done; 1444 case 597: /* lswi */
1445 if (rb == 0)
1446 rb = 32; /* # bytes to load */
1447 op->type = MKOP(LOAD_MULTI, 0, rb);
1448 op->ea = 0;
1449 if (ra)
1450 op->ea = truncate_if_32bit(regs->msr,
1451 regs->gpr[ra]);
1452 break;
1472 1453
1473#ifdef CONFIG_PPC_FPU 1454#ifdef CONFIG_PPC_FPU
1474 case 535: /* lfsx */ 1455 case 535: /* lfsx */
1475 case 567: /* lfsux */ 1456 case 567: /* lfsux */
1476 if (!(regs->msr & MSR_FP)) 1457 if (!(regs->msr & MSR_FP))
1477 break; 1458 goto fpunavail;
1478 ea = xform_ea(instr, regs, u); 1459 op->type = MKOP(LOAD_FP, u, 4);
1479 err = do_fp_load(rd, do_lfs, ea, 4, regs); 1460 break;
1480 goto ldst_done;
1481 1461
1482 case 599: /* lfdx */ 1462 case 599: /* lfdx */
1483 case 631: /* lfdux */ 1463 case 631: /* lfdux */
1484 if (!(regs->msr & MSR_FP)) 1464 if (!(regs->msr & MSR_FP))
1485 break; 1465 goto fpunavail;
1486 ea = xform_ea(instr, regs, u); 1466 op->type = MKOP(LOAD_FP, u, 8);
1487 err = do_fp_load(rd, do_lfd, ea, 8, regs); 1467 break;
1488 goto ldst_done;
1489 1468
1490 case 663: /* stfsx */ 1469 case 663: /* stfsx */
1491 case 695: /* stfsux */ 1470 case 695: /* stfsux */
1492 if (!(regs->msr & MSR_FP)) 1471 if (!(regs->msr & MSR_FP))
1493 break; 1472 goto fpunavail;
1494 ea = xform_ea(instr, regs, u); 1473 op->type = MKOP(STORE_FP, u, 4);
1495 err = do_fp_store(rd, do_stfs, ea, 4, regs); 1474 break;
1496 goto ldst_done;
1497 1475
1498 case 727: /* stfdx */ 1476 case 727: /* stfdx */
1499 case 759: /* stfdux */ 1477 case 759: /* stfdux */
1500 if (!(regs->msr & MSR_FP)) 1478 if (!(regs->msr & MSR_FP))
1501 break; 1479 goto fpunavail;
1502 ea = xform_ea(instr, regs, u); 1480 op->type = MKOP(STORE_FP, u, 8);
1503 err = do_fp_store(rd, do_stfd, ea, 8, regs); 1481 break;
1504 goto ldst_done;
1505#endif 1482#endif
1506 1483
1507#ifdef __powerpc64__ 1484#ifdef __powerpc64__
1508 case 660: /* stdbrx */ 1485 case 660: /* stdbrx */
1509 val = byterev_8(regs->gpr[rd]); 1486 op->type = MKOP(STORE, BYTEREV, 8);
1510 err = write_mem(val, xform_ea(instr, regs, 0), 8, regs); 1487 op->val = byterev_8(regs->gpr[rd]);
1511 goto ldst_done; 1488 break;
1512 1489
1513#endif 1490#endif
1491 case 661: /* stswx */
1492 op->type = MKOP(STORE_MULTI, 0, regs->xer & 0x7f);
1493 break;
1494
1514 case 662: /* stwbrx */ 1495 case 662: /* stwbrx */
1515 val = byterev_4(regs->gpr[rd]); 1496 op->type = MKOP(STORE, BYTEREV, 4);
1516 err = write_mem(val, xform_ea(instr, regs, 0), 4, regs); 1497 op->val = byterev_4(regs->gpr[rd]);
1517 goto ldst_done; 1498 break;
1499
1500 case 725:
1501 if (rb == 0)
1502 rb = 32; /* # bytes to store */
1503 op->type = MKOP(STORE_MULTI, 0, rb);
1504 op->ea = 0;
1505 if (ra)
1506 op->ea = truncate_if_32bit(regs->msr,
1507 regs->gpr[ra]);
1508 break;
1518 1509
1519 case 790: /* lhbrx */ 1510 case 790: /* lhbrx */
1520 err = read_mem(&val, xform_ea(instr, regs, 0), 2, regs); 1511 op->type = MKOP(LOAD, BYTEREV, 2);
1521 if (!err) 1512 break;
1522 regs->gpr[rd] = byterev_2(val);
1523 goto ldst_done;
1524 1513
1525 case 918: /* sthbrx */ 1514 case 918: /* sthbrx */
1526 val = byterev_2(regs->gpr[rd]); 1515 op->type = MKOP(STORE, BYTEREV, 2);
1527 err = write_mem(val, xform_ea(instr, regs, 0), 2, regs); 1516 op->val = byterev_2(regs->gpr[rd]);
1528 goto ldst_done; 1517 break;
1529 1518
1530#ifdef CONFIG_VSX 1519#ifdef CONFIG_VSX
1531 case 844: /* lxvd2x */ 1520 case 844: /* lxvd2x */
1532 case 876: /* lxvd2ux */ 1521 case 876: /* lxvd2ux */
1533 if (!(regs->msr & MSR_VSX)) 1522 if (!(regs->msr & MSR_VSX))
1534 break; 1523 goto vsxunavail;
1535 rd |= (instr & 1) << 5; 1524 op->reg = rd | ((instr & 1) << 5);
1536 ea = xform_ea(instr, regs, u); 1525 op->type = MKOP(LOAD_VSX, u, 16);
1537 err = do_vsx_load(rd, do_lxvd2x, ea, regs); 1526 break;
1538 goto ldst_done;
1539 1527
1540 case 972: /* stxvd2x */ 1528 case 972: /* stxvd2x */
1541 case 1004: /* stxvd2ux */ 1529 case 1004: /* stxvd2ux */
1542 if (!(regs->msr & MSR_VSX)) 1530 if (!(regs->msr & MSR_VSX))
1543 break; 1531 goto vsxunavail;
1544 rd |= (instr & 1) << 5; 1532 op->reg = rd | ((instr & 1) << 5);
1545 ea = xform_ea(instr, regs, u); 1533 op->type = MKOP(STORE_VSX, u, 16);
1546 err = do_vsx_store(rd, do_stxvd2x, ea, regs); 1534 break;
1547 goto ldst_done;
1548 1535
1549#endif /* CONFIG_VSX */ 1536#endif /* CONFIG_VSX */
1550 } 1537 }
@@ -1552,178 +1539,123 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1552 1539
1553 case 32: /* lwz */ 1540 case 32: /* lwz */
1554 case 33: /* lwzu */ 1541 case 33: /* lwzu */
1555 err = read_mem(&regs->gpr[rd], dform_ea(instr, regs), 4, regs); 1542 op->type = MKOP(LOAD, u, 4);
1556 goto ldst_done; 1543 op->ea = dform_ea(instr, regs);
1544 break;
1557 1545
1558 case 34: /* lbz */ 1546 case 34: /* lbz */
1559 case 35: /* lbzu */ 1547 case 35: /* lbzu */
1560 err = read_mem(&regs->gpr[rd], dform_ea(instr, regs), 1, regs); 1548 op->type = MKOP(LOAD, u, 1);
1561 goto ldst_done; 1549 op->ea = dform_ea(instr, regs);
1550 break;
1562 1551
1563 case 36: /* stw */ 1552 case 36: /* stw */
1564 val = regs->gpr[rd];
1565 err = write_mem(val, dform_ea(instr, regs), 4, regs);
1566 goto ldst_done;
1567
1568 case 37: /* stwu */ 1553 case 37: /* stwu */
1569 val = regs->gpr[rd]; 1554 op->type = MKOP(STORE, u, 4);
1570 val3 = dform_ea(instr, regs); 1555 op->ea = dform_ea(instr, regs);
1571 /* 1556 break;
1572 * For PPC32 we always use stwu to change stack point with r1. So
1573 * this emulated store may corrupt the exception frame, now we
1574 * have to provide the exception frame trampoline, which is pushed
1575 * below the kprobed function stack. So we only update gpr[1] but
1576 * don't emulate the real store operation. We will do real store
1577 * operation safely in exception return code by checking this flag.
1578 */
1579 if ((ra == 1) && !(regs->msr & MSR_PR) \
1580 && (val3 >= (regs->gpr[1] - STACK_INT_FRAME_SIZE))) {
1581#ifdef CONFIG_PPC32
1582 /*
1583 * Check if we will touch kernel sack overflow
1584 */
1585 if (val3 - STACK_INT_FRAME_SIZE <= current->thread.ksp_limit) {
1586 printk(KERN_CRIT "Can't kprobe this since Kernel stack overflow.\n");
1587 err = -EINVAL;
1588 break;
1589 }
1590#endif /* CONFIG_PPC32 */
1591 /*
1592 * Check if we already set since that means we'll
1593 * lose the previous value.
1594 */
1595 WARN_ON(test_thread_flag(TIF_EMULATE_STACK_STORE));
1596 set_thread_flag(TIF_EMULATE_STACK_STORE);
1597 err = 0;
1598 } else
1599 err = write_mem(val, val3, 4, regs);
1600 goto ldst_done;
1601 1557
1602 case 38: /* stb */ 1558 case 38: /* stb */
1603 case 39: /* stbu */ 1559 case 39: /* stbu */
1604 val = regs->gpr[rd]; 1560 op->type = MKOP(STORE, u, 1);
1605 err = write_mem(val, dform_ea(instr, regs), 1, regs); 1561 op->ea = dform_ea(instr, regs);
1606 goto ldst_done; 1562 break;
1607 1563
1608 case 40: /* lhz */ 1564 case 40: /* lhz */
1609 case 41: /* lhzu */ 1565 case 41: /* lhzu */
1610 err = read_mem(&regs->gpr[rd], dform_ea(instr, regs), 2, regs); 1566 op->type = MKOP(LOAD, u, 2);
1611 goto ldst_done; 1567 op->ea = dform_ea(instr, regs);
1568 break;
1612 1569
1613 case 42: /* lha */ 1570 case 42: /* lha */
1614 case 43: /* lhau */ 1571 case 43: /* lhau */
1615 err = read_mem(&regs->gpr[rd], dform_ea(instr, regs), 2, regs); 1572 op->type = MKOP(LOAD, SIGNEXT | u, 2);
1616 if (!err) 1573 op->ea = dform_ea(instr, regs);
1617 regs->gpr[rd] = (signed short) regs->gpr[rd]; 1574 break;
1618 goto ldst_done;
1619 1575
1620 case 44: /* sth */ 1576 case 44: /* sth */
1621 case 45: /* sthu */ 1577 case 45: /* sthu */
1622 val = regs->gpr[rd]; 1578 op->type = MKOP(STORE, u, 2);
1623 err = write_mem(val, dform_ea(instr, regs), 2, regs); 1579 op->ea = dform_ea(instr, regs);
1624 goto ldst_done; 1580 break;
1625 1581
1626 case 46: /* lmw */ 1582 case 46: /* lmw */
1627 ra = (instr >> 16) & 0x1f;
1628 if (ra >= rd) 1583 if (ra >= rd)
1629 break; /* invalid form, ra in range to load */ 1584 break; /* invalid form, ra in range to load */
1630 ea = dform_ea(instr, regs); 1585 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd));
1631 do { 1586 op->ea = dform_ea(instr, regs);
1632 err = read_mem(&regs->gpr[rd], ea, 4, regs); 1587 break;
1633 if (err)
1634 return 0;
1635 ea += 4;
1636 } while (++rd < 32);
1637 goto instr_done;
1638 1588
1639 case 47: /* stmw */ 1589 case 47: /* stmw */
1640 ea = dform_ea(instr, regs); 1590 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd));
1641 do { 1591 op->ea = dform_ea(instr, regs);
1642 err = write_mem(regs->gpr[rd], ea, 4, regs); 1592 break;
1643 if (err)
1644 return 0;
1645 ea += 4;
1646 } while (++rd < 32);
1647 goto instr_done;
1648 1593
1649#ifdef CONFIG_PPC_FPU 1594#ifdef CONFIG_PPC_FPU
1650 case 48: /* lfs */ 1595 case 48: /* lfs */
1651 case 49: /* lfsu */ 1596 case 49: /* lfsu */
1652 if (!(regs->msr & MSR_FP)) 1597 if (!(regs->msr & MSR_FP))
1653 break; 1598 goto fpunavail;
1654 ea = dform_ea(instr, regs); 1599 op->type = MKOP(LOAD_FP, u, 4);
1655 err = do_fp_load(rd, do_lfs, ea, 4, regs); 1600 op->ea = dform_ea(instr, regs);
1656 goto ldst_done; 1601 break;
1657 1602
1658 case 50: /* lfd */ 1603 case 50: /* lfd */
1659 case 51: /* lfdu */ 1604 case 51: /* lfdu */
1660 if (!(regs->msr & MSR_FP)) 1605 if (!(regs->msr & MSR_FP))
1661 break; 1606 goto fpunavail;
1662 ea = dform_ea(instr, regs); 1607 op->type = MKOP(LOAD_FP, u, 8);
1663 err = do_fp_load(rd, do_lfd, ea, 8, regs); 1608 op->ea = dform_ea(instr, regs);
1664 goto ldst_done; 1609 break;
1665 1610
1666 case 52: /* stfs */ 1611 case 52: /* stfs */
1667 case 53: /* stfsu */ 1612 case 53: /* stfsu */
1668 if (!(regs->msr & MSR_FP)) 1613 if (!(regs->msr & MSR_FP))
1669 break; 1614 goto fpunavail;
1670 ea = dform_ea(instr, regs); 1615 op->type = MKOP(STORE_FP, u, 4);
1671 err = do_fp_store(rd, do_stfs, ea, 4, regs); 1616 op->ea = dform_ea(instr, regs);
1672 goto ldst_done; 1617 break;
1673 1618
1674 case 54: /* stfd */ 1619 case 54: /* stfd */
1675 case 55: /* stfdu */ 1620 case 55: /* stfdu */
1676 if (!(regs->msr & MSR_FP)) 1621 if (!(regs->msr & MSR_FP))
1677 break; 1622 goto fpunavail;
1678 ea = dform_ea(instr, regs); 1623 op->type = MKOP(STORE_FP, u, 8);
1679 err = do_fp_store(rd, do_stfd, ea, 8, regs); 1624 op->ea = dform_ea(instr, regs);
1680 goto ldst_done; 1625 break;
1681#endif 1626#endif
1682 1627
1683#ifdef __powerpc64__ 1628#ifdef __powerpc64__
1684 case 58: /* ld[u], lwa */ 1629 case 58: /* ld[u], lwa */
1630 op->ea = dsform_ea(instr, regs);
1685 switch (instr & 3) { 1631 switch (instr & 3) {
1686 case 0: /* ld */ 1632 case 0: /* ld */
1687 err = read_mem(&regs->gpr[rd], dsform_ea(instr, regs), 1633 op->type = MKOP(LOAD, 0, 8);
1688 8, regs); 1634 break;
1689 goto ldst_done;
1690 case 1: /* ldu */ 1635 case 1: /* ldu */
1691 err = read_mem(&regs->gpr[rd], dsform_ea(instr, regs), 1636 op->type = MKOP(LOAD, UPDATE, 8);
1692 8, regs); 1637 break;
1693 goto ldst_done;
1694 case 2: /* lwa */ 1638 case 2: /* lwa */
1695 err = read_mem(&regs->gpr[rd], dsform_ea(instr, regs), 1639 op->type = MKOP(LOAD, SIGNEXT, 4);
1696 4, regs); 1640 break;
1697 if (!err)
1698 regs->gpr[rd] = (signed int) regs->gpr[rd];
1699 goto ldst_done;
1700 } 1641 }
1701 break; 1642 break;
1702 1643
1703 case 62: /* std[u] */ 1644 case 62: /* std[u] */
1704 val = regs->gpr[rd]; 1645 op->ea = dsform_ea(instr, regs);
1705 switch (instr & 3) { 1646 switch (instr & 3) {
1706 case 0: /* std */ 1647 case 0: /* std */
1707 err = write_mem(val, dsform_ea(instr, regs), 8, regs); 1648 op->type = MKOP(STORE, 0, 8);
1708 goto ldst_done; 1649 break;
1709 case 1: /* stdu */ 1650 case 1: /* stdu */
1710 err = write_mem(val, dsform_ea(instr, regs), 8, regs); 1651 op->type = MKOP(STORE, UPDATE, 8);
1711 goto ldst_done; 1652 break;
1712 } 1653 }
1713 break; 1654 break;
1714#endif /* __powerpc64__ */ 1655#endif /* __powerpc64__ */
1715 1656
1716 } 1657 }
1717 err = -EINVAL; 1658 return 0;
1718
1719 ldst_done:
1720 if (err) {
1721 regs->gpr[ra] = old_ra;
1722 return 0; /* invoke DSI if -EFAULT? */
1723 }
1724 instr_done:
1725 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
1726 return 1;
1727 1659
1728 logical_done: 1660 logical_done:
1729 if (instr & 1) 1661 if (instr & 1)
@@ -1733,5 +1665,349 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1733 arith_done: 1665 arith_done:
1734 if (instr & 1) 1666 if (instr & 1)
1735 set_cr0(regs, rd); 1667 set_cr0(regs, rd);
1736 goto instr_done; 1668
1669 instr_done:
1670 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
1671 return 1;
1672
1673 priv:
1674 op->type = INTERRUPT | 0x700;
1675 op->val = SRR1_PROGPRIV;
1676 return 0;
1677
1678 trap:
1679 op->type = INTERRUPT | 0x700;
1680 op->val = SRR1_PROGTRAP;
1681 return 0;
1682
1683#ifdef CONFIG_PPC_FPU
1684 fpunavail:
1685 op->type = INTERRUPT | 0x800;
1686 return 0;
1687#endif
1688
1689#ifdef CONFIG_ALTIVEC
1690 vecunavail:
1691 op->type = INTERRUPT | 0xf20;
1692 return 0;
1693#endif
1694
1695#ifdef CONFIG_VSX
1696 vsxunavail:
1697 op->type = INTERRUPT | 0xf40;
1698 return 0;
1699#endif
1700}
1701EXPORT_SYMBOL_GPL(analyse_instr);
1702
1703/*
1704 * For PPC32 we always use stwu with r1 to change the stack pointer.
1705 * So this emulated store may corrupt the exception frame, now we
1706 * have to provide the exception frame trampoline, which is pushed
1707 * below the kprobed function stack. So we only update gpr[1] but
1708 * don't emulate the real store operation. We will do real store
1709 * operation safely in exception return code by checking this flag.
1710 */
1711static __kprobes int handle_stack_update(unsigned long ea, struct pt_regs *regs)
1712{
1713#ifdef CONFIG_PPC32
1714 /*
1715 * Check if we will touch kernel stack overflow
1716 */
1717 if (ea - STACK_INT_FRAME_SIZE <= current->thread.ksp_limit) {
1718 printk(KERN_CRIT "Can't kprobe this since kernel stack would overflow.\n");
1719 return -EINVAL;
1720 }
1721#endif /* CONFIG_PPC32 */
1722 /*
1723 * Check if we already set since that means we'll
1724 * lose the previous value.
1725 */
1726 WARN_ON(test_thread_flag(TIF_EMULATE_STACK_STORE));
1727 set_thread_flag(TIF_EMULATE_STACK_STORE);
1728 return 0;
1729}
1730
1731static __kprobes void do_signext(unsigned long *valp, int size)
1732{
1733 switch (size) {
1734 case 2:
1735 *valp = (signed short) *valp;
1736 break;
1737 case 4:
1738 *valp = (signed int) *valp;
1739 break;
1740 }
1741}
1742
1743static __kprobes void do_byterev(unsigned long *valp, int size)
1744{
1745 switch (size) {
1746 case 2:
1747 *valp = byterev_2(*valp);
1748 break;
1749 case 4:
1750 *valp = byterev_4(*valp);
1751 break;
1752#ifdef __powerpc64__
1753 case 8:
1754 *valp = byterev_8(*valp);
1755 break;
1756#endif
1757 }
1758}
1759
1760/*
1761 * Emulate instructions that cause a transfer of control,
1762 * loads and stores, and a few other instructions.
1763 * Returns 1 if the step was emulated, 0 if not,
1764 * or -1 if the instruction is one that should not be stepped,
1765 * such as an rfid, or a mtmsrd that would clear MSR_RI.
1766 */
1767int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1768{
1769 struct instruction_op op;
1770 int r, err, size;
1771 unsigned long val;
1772 unsigned int cr;
1773 int i, rd, nb;
1774
1775 r = analyse_instr(&op, regs, instr);
1776 if (r != 0)
1777 return r;
1778
1779 err = 0;
1780 size = GETSIZE(op.type);
1781 switch (op.type & INSTR_TYPE_MASK) {
1782 case CACHEOP:
1783 if (!address_ok(regs, op.ea, 8))
1784 return 0;
1785 switch (op.type & CACHEOP_MASK) {
1786 case DCBST:
1787 __cacheop_user_asmx(op.ea, err, "dcbst");
1788 break;
1789 case DCBF:
1790 __cacheop_user_asmx(op.ea, err, "dcbf");
1791 break;
1792 case DCBTST:
1793 if (op.reg == 0)
1794 prefetchw((void *) op.ea);
1795 break;
1796 case DCBT:
1797 if (op.reg == 0)
1798 prefetch((void *) op.ea);
1799 break;
1800 case ICBI:
1801 __cacheop_user_asmx(op.ea, err, "icbi");
1802 break;
1803 }
1804 if (err)
1805 return 0;
1806 goto instr_done;
1807
1808 case LARX:
1809 if (regs->msr & MSR_LE)
1810 return 0;
1811 if (op.ea & (size - 1))
1812 break; /* can't handle misaligned */
1813 err = -EFAULT;
1814 if (!address_ok(regs, op.ea, size))
1815 goto ldst_done;
1816 err = 0;
1817 switch (size) {
1818 case 4:
1819 __get_user_asmx(val, op.ea, err, "lwarx");
1820 break;
1821 case 8:
1822 __get_user_asmx(val, op.ea, err, "ldarx");
1823 break;
1824 default:
1825 return 0;
1826 }
1827 if (!err)
1828 regs->gpr[op.reg] = val;
1829 goto ldst_done;
1830
1831 case STCX:
1832 if (regs->msr & MSR_LE)
1833 return 0;
1834 if (op.ea & (size - 1))
1835 break; /* can't handle misaligned */
1836 err = -EFAULT;
1837 if (!address_ok(regs, op.ea, size))
1838 goto ldst_done;
1839 err = 0;
1840 switch (size) {
1841 case 4:
1842 __put_user_asmx(op.val, op.ea, err, "stwcx.", cr);
1843 break;
1844 case 8:
1845 __put_user_asmx(op.val, op.ea, err, "stdcx.", cr);
1846 break;
1847 default:
1848 return 0;
1849 }
1850 if (!err)
1851 regs->ccr = (regs->ccr & 0x0fffffff) |
1852 (cr & 0xe0000000) |
1853 ((regs->xer >> 3) & 0x10000000);
1854 goto ldst_done;
1855
1856 case LOAD:
1857 if (regs->msr & MSR_LE)
1858 return 0;
1859 err = read_mem(&regs->gpr[op.reg], op.ea, size, regs);
1860 if (!err) {
1861 if (op.type & SIGNEXT)
1862 do_signext(&regs->gpr[op.reg], size);
1863 if (op.type & BYTEREV)
1864 do_byterev(&regs->gpr[op.reg], size);
1865 }
1866 goto ldst_done;
1867
1868 case LOAD_FP:
1869 if (regs->msr & MSR_LE)
1870 return 0;
1871 if (size == 4)
1872 err = do_fp_load(op.reg, do_lfs, op.ea, size, regs);
1873 else
1874 err = do_fp_load(op.reg, do_lfd, op.ea, size, regs);
1875 goto ldst_done;
1876
1877#ifdef CONFIG_ALTIVEC
1878 case LOAD_VMX:
1879 if (regs->msr & MSR_LE)
1880 return 0;
1881 err = do_vec_load(op.reg, do_lvx, op.ea & ~0xfUL, regs);
1882 goto ldst_done;
1883#endif
1884#ifdef CONFIG_VSX
1885 case LOAD_VSX:
1886 if (regs->msr & MSR_LE)
1887 return 0;
1888 err = do_vsx_load(op.reg, do_lxvd2x, op.ea, regs);
1889 goto ldst_done;
1890#endif
1891 case LOAD_MULTI:
1892 if (regs->msr & MSR_LE)
1893 return 0;
1894 rd = op.reg;
1895 for (i = 0; i < size; i += 4) {
1896 nb = size - i;
1897 if (nb > 4)
1898 nb = 4;
1899 err = read_mem(&regs->gpr[rd], op.ea, nb, regs);
1900 if (err)
1901 return 0;
1902 if (nb < 4) /* left-justify last bytes */
1903 regs->gpr[rd] <<= 32 - 8 * nb;
1904 op.ea += 4;
1905 ++rd;
1906 }
1907 goto instr_done;
1908
1909 case STORE:
1910 if (regs->msr & MSR_LE)
1911 return 0;
1912 if ((op.type & UPDATE) && size == sizeof(long) &&
1913 op.reg == 1 && op.update_reg == 1 &&
1914 !(regs->msr & MSR_PR) &&
1915 op.ea >= regs->gpr[1] - STACK_INT_FRAME_SIZE) {
1916 err = handle_stack_update(op.ea, regs);
1917 goto ldst_done;
1918 }
1919 err = write_mem(op.val, op.ea, size, regs);
1920 goto ldst_done;
1921
1922 case STORE_FP:
1923 if (regs->msr & MSR_LE)
1924 return 0;
1925 if (size == 4)
1926 err = do_fp_store(op.reg, do_stfs, op.ea, size, regs);
1927 else
1928 err = do_fp_store(op.reg, do_stfd, op.ea, size, regs);
1929 goto ldst_done;
1930
1931#ifdef CONFIG_ALTIVEC
1932 case STORE_VMX:
1933 if (regs->msr & MSR_LE)
1934 return 0;
1935 err = do_vec_store(op.reg, do_stvx, op.ea & ~0xfUL, regs);
1936 goto ldst_done;
1937#endif
1938#ifdef CONFIG_VSX
1939 case STORE_VSX:
1940 if (regs->msr & MSR_LE)
1941 return 0;
1942 err = do_vsx_store(op.reg, do_stxvd2x, op.ea, regs);
1943 goto ldst_done;
1944#endif
1945 case STORE_MULTI:
1946 if (regs->msr & MSR_LE)
1947 return 0;
1948 rd = op.reg;
1949 for (i = 0; i < size; i += 4) {
1950 val = regs->gpr[rd];
1951 nb = size - i;
1952 if (nb > 4)
1953 nb = 4;
1954 else
1955 val >>= 32 - 8 * nb;
1956 err = write_mem(val, op.ea, nb, regs);
1957 if (err)
1958 return 0;
1959 op.ea += 4;
1960 ++rd;
1961 }
1962 goto instr_done;
1963
1964 case MFMSR:
1965 regs->gpr[op.reg] = regs->msr & MSR_MASK;
1966 goto instr_done;
1967
1968 case MTMSR:
1969 val = regs->gpr[op.reg];
1970 if ((val & MSR_RI) == 0)
1971 /* can't step mtmsr[d] that would clear MSR_RI */
1972 return -1;
1973 /* here op.val is the mask of bits to change */
1974 regs->msr = (regs->msr & ~op.val) | (val & op.val);
1975 goto instr_done;
1976
1977#ifdef CONFIG_PPC64
1978 case SYSCALL: /* sc */
1979 /*
1980 * N.B. this uses knowledge about how the syscall
1981 * entry code works. If that is changed, this will
1982 * need to be changed also.
1983 */
1984 if (regs->gpr[0] == 0x1ebe &&
1985 cpu_has_feature(CPU_FTR_REAL_LE)) {
1986 regs->msr ^= MSR_LE;
1987 goto instr_done;
1988 }
1989 regs->gpr[9] = regs->gpr[13];
1990 regs->gpr[10] = MSR_KERNEL;
1991 regs->gpr[11] = regs->nip + 4;
1992 regs->gpr[12] = regs->msr & MSR_MASK;
1993 regs->gpr[13] = (unsigned long) get_paca();
1994 regs->nip = (unsigned long) &system_call_common;
1995 regs->msr = MSR_KERNEL;
1996 return 1;
1997
1998 case RFI:
1999 return -1;
2000#endif
2001 }
2002 return 0;
2003
2004 ldst_done:
2005 if (err)
2006 return 0;
2007 if (op.type & UPDATE)
2008 regs->gpr[op.update_reg] = op.ea;
2009
2010 instr_done:
2011 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
2012 return 1;
1737} 2013}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-20 18:53:35 -0500