KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8

This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7)
compatibility modes on a POWER8 processor.  (Note that transactional
memory is disabled for usermode if either or both of the PCR_TM_DIS
and PCR_ARCH_206 bits are set.)

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>

1 files changed, 15 insertions, 1 deletions

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 1bf681e8a05f..1e9f4b45432b 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -184,14 +184,28 @@ int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
 
                 switch (arch_compat) {
                 case PVR_ARCH_205:
-                        pcr = PCR_ARCH_205;
+                        /*
+                         * If an arch bit is set in PCR, all the defined
+                         * higher-order arch bits also have to be set.
+                         */
+                        pcr = PCR_ARCH_206 | PCR_ARCH_205;
                         break;
                 case PVR_ARCH_206:
                 case PVR_ARCH_206p:
+                        pcr = PCR_ARCH_206;
+                        break;
+                case PVR_ARCH_207:
                         break;
                 default:
                         return -EINVAL;
                 }
+
+                if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
+                        /* POWER7 can't emulate POWER8 */
+                        if (!(pcr & PCR_ARCH_206))
+                                return -EINVAL;
+                        pcr &= ~PCR_ARCH_206;
+                }
         }
 
         spin_lock(&vc->lock);