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authorHollis Blanchard <hollisb@us.ibm.com>2008-07-25 14:54:53 -0400
committerAvi Kivity <avi@qumranet.com>2008-10-15 04:15:16 -0400
commit49dd2c492895828a90ecdf889e7fe9cfb40a82a7 (patch)
tree63b5f85b0ed5a94c8265d86dda4db262b00adf95 /arch/powerpc/kvm/booke_guest.c
parent83aae4a8098eb8a40a2e9dab3714354182143b4f (diff)
KVM: powerpc: Map guest userspace with TID=0 mappings
When we use TID=N userspace mappings, we must ensure that kernel mappings have been destroyed when entering userspace. Using TID=1/TID=0 for kernel/user mappings and running userspace with PID=0 means that userspace can't access the kernel mappings, but the kernel can directly access userspace. The net is that we don't need to flush the TLB on privilege switches, but we do on guest context switches (which are far more infrequent). Guest boot time performance improvement: about 30%. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/powerpc/kvm/booke_guest.c')
-rw-r--r--arch/powerpc/kvm/booke_guest.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/booke_guest.c b/arch/powerpc/kvm/booke_guest.c
index 3cca079975e1..7b2591e26bae 100644
--- a/arch/powerpc/kvm/booke_guest.c
+++ b/arch/powerpc/kvm/booke_guest.c
@@ -486,6 +486,8 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
486 vcpu->arch.msr = 0; 486 vcpu->arch.msr = 0;
487 vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */ 487 vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
488 488
489 vcpu->arch.shadow_pid = 1;
490
489 /* Eye-catching number so we know if the guest takes an interrupt 491 /* Eye-catching number so we know if the guest takes an interrupt
490 * before it's programmed its own IVPR. */ 492 * before it's programmed its own IVPR. */
491 vcpu->arch.ivpr = 0x55550000; 493 vcpu->arch.ivpr = 0x55550000;