diff options
author | Alexander Graf <agraf@suse.de> | 2010-01-07 20:58:01 -0500 |
---|---|---|
committer | Marcelo Tosatti <mtosatti@redhat.com> | 2010-03-01 10:35:47 -0500 |
commit | 8e5b26b55a8b6aee2c789b1d20ec715f9e4bea5c (patch) | |
tree | 4e2d003852ce327a47153b6c100239c6d8e1418f /arch/powerpc/kvm/booke_emulate.c | |
parent | 0d178975d0a5afe5e0fd3211bd1397905b225be5 (diff) |
KVM: PPC: Use accessor functions for GPR access
All code in PPC KVM currently accesses gprs in the vcpu struct directly.
While there's nothing wrong with that wrt the current way gprs are stored
and loaded, it doesn't suffice for the PACA acceleration that will follow
in this patchset.
So let's just create little wrapper inline functions that we call whenever
a GPR needs to be read from or written to. The compiled code shouldn't really
change at all for now.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc/kvm/booke_emulate.c')
-rw-r--r-- | arch/powerpc/kvm/booke_emulate.c | 107 |
1 files changed, 54 insertions, 53 deletions
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c index aebc65e93f4b..cbc790ee1928 100644 --- a/arch/powerpc/kvm/booke_emulate.c +++ b/arch/powerpc/kvm/booke_emulate.c | |||
@@ -62,20 +62,20 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
62 | 62 | ||
63 | case OP_31_XOP_MFMSR: | 63 | case OP_31_XOP_MFMSR: |
64 | rt = get_rt(inst); | 64 | rt = get_rt(inst); |
65 | vcpu->arch.gpr[rt] = vcpu->arch.msr; | 65 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.msr); |
66 | kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS); | 66 | kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS); |
67 | break; | 67 | break; |
68 | 68 | ||
69 | case OP_31_XOP_MTMSR: | 69 | case OP_31_XOP_MTMSR: |
70 | rs = get_rs(inst); | 70 | rs = get_rs(inst); |
71 | kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS); | 71 | kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS); |
72 | kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]); | 72 | kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs)); |
73 | break; | 73 | break; |
74 | 74 | ||
75 | case OP_31_XOP_WRTEE: | 75 | case OP_31_XOP_WRTEE: |
76 | rs = get_rs(inst); | 76 | rs = get_rs(inst); |
77 | vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE) | 77 | vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE) |
78 | | (vcpu->arch.gpr[rs] & MSR_EE); | 78 | | (kvmppc_get_gpr(vcpu, rs) & MSR_EE); |
79 | kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS); | 79 | kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS); |
80 | break; | 80 | break; |
81 | 81 | ||
@@ -101,22 +101,23 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
101 | int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | 101 | int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) |
102 | { | 102 | { |
103 | int emulated = EMULATE_DONE; | 103 | int emulated = EMULATE_DONE; |
104 | ulong spr_val = kvmppc_get_gpr(vcpu, rs); | ||
104 | 105 | ||
105 | switch (sprn) { | 106 | switch (sprn) { |
106 | case SPRN_DEAR: | 107 | case SPRN_DEAR: |
107 | vcpu->arch.dear = vcpu->arch.gpr[rs]; break; | 108 | vcpu->arch.dear = spr_val; break; |
108 | case SPRN_ESR: | 109 | case SPRN_ESR: |
109 | vcpu->arch.esr = vcpu->arch.gpr[rs]; break; | 110 | vcpu->arch.esr = spr_val; break; |
110 | case SPRN_DBCR0: | 111 | case SPRN_DBCR0: |
111 | vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break; | 112 | vcpu->arch.dbcr0 = spr_val; break; |
112 | case SPRN_DBCR1: | 113 | case SPRN_DBCR1: |
113 | vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break; | 114 | vcpu->arch.dbcr1 = spr_val; break; |
114 | case SPRN_DBSR: | 115 | case SPRN_DBSR: |
115 | vcpu->arch.dbsr &= ~vcpu->arch.gpr[rs]; break; | 116 | vcpu->arch.dbsr &= ~spr_val; break; |
116 | case SPRN_TSR: | 117 | case SPRN_TSR: |
117 | vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break; | 118 | vcpu->arch.tsr &= ~spr_val; break; |
118 | case SPRN_TCR: | 119 | case SPRN_TCR: |
119 | vcpu->arch.tcr = vcpu->arch.gpr[rs]; | 120 | vcpu->arch.tcr = spr_val; |
120 | kvmppc_emulate_dec(vcpu); | 121 | kvmppc_emulate_dec(vcpu); |
121 | break; | 122 | break; |
122 | 123 | ||
@@ -124,64 +125,64 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | |||
124 | * loaded into the real SPRGs when resuming the | 125 | * loaded into the real SPRGs when resuming the |
125 | * guest. */ | 126 | * guest. */ |
126 | case SPRN_SPRG4: | 127 | case SPRN_SPRG4: |
127 | vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break; | 128 | vcpu->arch.sprg4 = spr_val; break; |
128 | case SPRN_SPRG5: | 129 | case SPRN_SPRG5: |
129 | vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break; | 130 | vcpu->arch.sprg5 = spr_val; break; |
130 | case SPRN_SPRG6: | 131 | case SPRN_SPRG6: |
131 | vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break; | 132 | vcpu->arch.sprg6 = spr_val; break; |
132 | case SPRN_SPRG7: | 133 | case SPRN_SPRG7: |
133 | vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break; | 134 | vcpu->arch.sprg7 = spr_val; break; |
134 | 135 | ||
135 | case SPRN_IVPR: | 136 | case SPRN_IVPR: |
136 | vcpu->arch.ivpr = vcpu->arch.gpr[rs]; | 137 | vcpu->arch.ivpr = spr_val; |
137 | break; | 138 | break; |
138 | case SPRN_IVOR0: | 139 | case SPRN_IVOR0: |
139 | vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs]; | 140 | vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val; |
140 | break; | 141 | break; |
141 | case SPRN_IVOR1: | 142 | case SPRN_IVOR1: |
142 | vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs]; | 143 | vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val; |
143 | break; | 144 | break; |
144 | case SPRN_IVOR2: | 145 | case SPRN_IVOR2: |
145 | vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs]; | 146 | vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val; |
146 | break; | 147 | break; |
147 | case SPRN_IVOR3: | 148 | case SPRN_IVOR3: |
148 | vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs]; | 149 | vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val; |
149 | break; | 150 | break; |
150 | case SPRN_IVOR4: | 151 | case SPRN_IVOR4: |
151 | vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs]; | 152 | vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val; |
152 | break; | 153 | break; |
153 | case SPRN_IVOR5: | 154 | case SPRN_IVOR5: |
154 | vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs]; | 155 | vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val; |
155 | break; | 156 | break; |
156 | case SPRN_IVOR6: | 157 | case SPRN_IVOR6: |
157 | vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs]; | 158 | vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val; |
158 | break; | 159 | break; |
159 | case SPRN_IVOR7: | 160 | case SPRN_IVOR7: |
160 | vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs]; | 161 | vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val; |
161 | break; | 162 | break; |
162 | case SPRN_IVOR8: | 163 | case SPRN_IVOR8: |
163 | vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs]; | 164 | vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val; |
164 | break; | 165 | break; |
165 | case SPRN_IVOR9: | 166 | case SPRN_IVOR9: |
166 | vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs]; | 167 | vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val; |
167 | break; | 168 | break; |
168 | case SPRN_IVOR10: | 169 | case SPRN_IVOR10: |
169 | vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs]; | 170 | vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val; |
170 | break; | 171 | break; |
171 | case SPRN_IVOR11: | 172 | case SPRN_IVOR11: |
172 | vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs]; | 173 | vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val; |
173 | break; | 174 | break; |
174 | case SPRN_IVOR12: | 175 | case SPRN_IVOR12: |
175 | vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs]; | 176 | vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val; |
176 | break; | 177 | break; |
177 | case SPRN_IVOR13: | 178 | case SPRN_IVOR13: |
178 | vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs]; | 179 | vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val; |
179 | break; | 180 | break; |
180 | case SPRN_IVOR14: | 181 | case SPRN_IVOR14: |
181 | vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs]; | 182 | vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val; |
182 | break; | 183 | break; |
183 | case SPRN_IVOR15: | 184 | case SPRN_IVOR15: |
184 | vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs]; | 185 | vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val; |
185 | break; | 186 | break; |
186 | 187 | ||
187 | default: | 188 | default: |
@@ -197,65 +198,65 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | |||
197 | 198 | ||
198 | switch (sprn) { | 199 | switch (sprn) { |
199 | case SPRN_IVPR: | 200 | case SPRN_IVPR: |
200 | vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break; | 201 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivpr); break; |
201 | case SPRN_DEAR: | 202 | case SPRN_DEAR: |
202 | vcpu->arch.gpr[rt] = vcpu->arch.dear; break; | 203 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear); break; |
203 | case SPRN_ESR: | 204 | case SPRN_ESR: |
204 | vcpu->arch.gpr[rt] = vcpu->arch.esr; break; | 205 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.esr); break; |
205 | case SPRN_DBCR0: | 206 | case SPRN_DBCR0: |
206 | vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break; | 207 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr0); break; |
207 | case SPRN_DBCR1: | 208 | case SPRN_DBCR1: |
208 | vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break; | 209 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr1); break; |
209 | case SPRN_DBSR: | 210 | case SPRN_DBSR: |
210 | vcpu->arch.gpr[rt] = vcpu->arch.dbsr; break; | 211 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbsr); break; |
211 | 212 | ||
212 | case SPRN_IVOR0: | 213 | case SPRN_IVOR0: |
213 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; | 214 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]); |
214 | break; | 215 | break; |
215 | case SPRN_IVOR1: | 216 | case SPRN_IVOR1: |
216 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; | 217 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]); |
217 | break; | 218 | break; |
218 | case SPRN_IVOR2: | 219 | case SPRN_IVOR2: |
219 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; | 220 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]); |
220 | break; | 221 | break; |
221 | case SPRN_IVOR3: | 222 | case SPRN_IVOR3: |
222 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; | 223 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]); |
223 | break; | 224 | break; |
224 | case SPRN_IVOR4: | 225 | case SPRN_IVOR4: |
225 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; | 226 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]); |
226 | break; | 227 | break; |
227 | case SPRN_IVOR5: | 228 | case SPRN_IVOR5: |
228 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; | 229 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]); |
229 | break; | 230 | break; |
230 | case SPRN_IVOR6: | 231 | case SPRN_IVOR6: |
231 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; | 232 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]); |
232 | break; | 233 | break; |
233 | case SPRN_IVOR7: | 234 | case SPRN_IVOR7: |
234 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; | 235 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]); |
235 | break; | 236 | break; |
236 | case SPRN_IVOR8: | 237 | case SPRN_IVOR8: |
237 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; | 238 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]); |
238 | break; | 239 | break; |
239 | case SPRN_IVOR9: | 240 | case SPRN_IVOR9: |
240 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; | 241 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]); |
241 | break; | 242 | break; |
242 | case SPRN_IVOR10: | 243 | case SPRN_IVOR10: |
243 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; | 244 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]); |
244 | break; | 245 | break; |
245 | case SPRN_IVOR11: | 246 | case SPRN_IVOR11: |
246 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; | 247 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]); |
247 | break; | 248 | break; |
248 | case SPRN_IVOR12: | 249 | case SPRN_IVOR12: |
249 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; | 250 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]); |
250 | break; | 251 | break; |
251 | case SPRN_IVOR13: | 252 | case SPRN_IVOR13: |
252 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; | 253 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]); |
253 | break; | 254 | break; |
254 | case SPRN_IVOR14: | 255 | case SPRN_IVOR14: |
255 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; | 256 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]); |
256 | break; | 257 | break; |
257 | case SPRN_IVOR15: | 258 | case SPRN_IVOR15: |
258 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; | 259 | kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]); |
259 | break; | 260 | break; |
260 | 261 | ||
261 | default: | 262 | default: |