diff options
author | Alexander Graf <agraf@suse.de> | 2010-02-19 05:00:37 -0500 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2010-04-25 05:35:06 -0400 |
commit | 71db4089361b9424314c41fcf92f63ce26263fcc (patch) | |
tree | 584de466d83aff7ddcc4e923b67e975edc31ee89 /arch/powerpc/kvm/book3s_64_emulate.c | |
parent | e425a6de1a2b427747f5af17bd76630548944ff1 (diff) |
KVM: PPC: Implement mtsr instruction emulation
The Book3S_32 specifications allows for two instructions to modify segment
registers: mtsrin and mtsr.
Most normal operating systems use mtsrin, because it allows to define which
segment it wants to change using a register. But since I was trying to run
an embedded guest, it turned out to be using mtsr with hardcoded values.
So let's also emulate mtsr. It's a valid instruction after all.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc/kvm/book3s_64_emulate.c')
-rw-r--r-- | arch/powerpc/kvm/book3s_64_emulate.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_64_emulate.c b/arch/powerpc/kvm/book3s_64_emulate.c index bb4a7c1f8f05..e4e7ec318eb0 100644 --- a/arch/powerpc/kvm/book3s_64_emulate.c +++ b/arch/powerpc/kvm/book3s_64_emulate.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #define OP_31_XOP_MFMSR 83 | 28 | #define OP_31_XOP_MFMSR 83 |
29 | #define OP_31_XOP_MTMSR 146 | 29 | #define OP_31_XOP_MTMSR 146 |
30 | #define OP_31_XOP_MTMSRD 178 | 30 | #define OP_31_XOP_MTMSRD 178 |
31 | #define OP_31_XOP_MTSR 210 | ||
31 | #define OP_31_XOP_MTSRIN 242 | 32 | #define OP_31_XOP_MTSRIN 242 |
32 | #define OP_31_XOP_TLBIEL 274 | 33 | #define OP_31_XOP_TLBIEL 274 |
33 | #define OP_31_XOP_TLBIE 306 | 34 | #define OP_31_XOP_TLBIE 306 |
@@ -101,6 +102,11 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
101 | } | 102 | } |
102 | break; | 103 | break; |
103 | } | 104 | } |
105 | case OP_31_XOP_MTSR: | ||
106 | vcpu->arch.mmu.mtsrin(vcpu, | ||
107 | (inst >> 16) & 0xf, | ||
108 | kvmppc_get_gpr(vcpu, get_rs(inst))); | ||
109 | break; | ||
104 | case OP_31_XOP_MTSRIN: | 110 | case OP_31_XOP_MTSRIN: |
105 | vcpu->arch.mmu.mtsrin(vcpu, | 111 | vcpu->arch.mmu.mtsrin(vcpu, |
106 | (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf, | 112 | (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf, |