powerpc/kvm: Sync guest visible MMU state

Currently userspace has no chance to find out which virtual address space we're
in and resolve addresses. While that is a big problem for migration, it's also
unpleasent when debugging, as gdb and the monitor don't work on virtual
addresses.

This patch exports enough of the MMU segment state to userspace to make
debugging work and thus also includes the groundwork for migration.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 49 insertions, 0 deletions

diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 42037d46a416..3e294bd9b8c6 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -281,6 +281,7 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
 
 void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
 {
+        vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
         vcpu->arch.pvr = pvr;
         if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
                 kvmppc_mmu_book3s_64_init(vcpu);
@@ -762,14 +763,62 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                                   struct kvm_sregs *sregs)
 {
+        struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
+        int i;
+
         sregs->pvr = vcpu->arch.pvr;
+
+        sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
+        if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
+                for (i = 0; i < 64; i++) {
+                        sregs->u.s.ppc64.slb[i].slbe = vcpu3s->slb[i].orige | i;
+                        sregs->u.s.ppc64.slb[i].slbv = vcpu3s->slb[i].origv;
+                }
+        } else {
+                for (i = 0; i < 16; i++) {
+                        sregs->u.s.ppc32.sr[i] = vcpu3s->sr[i].raw;
+                        sregs->u.s.ppc32.sr[i] = vcpu3s->sr[i].raw;
+                }
+                for (i = 0; i < 8; i++) {
+                        sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
+                        sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
+                }
+        }
         return 0;
 }
 
 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
                                   struct kvm_sregs *sregs)
 {
+        struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
+        int i;
+
         kvmppc_set_pvr(vcpu, sregs->pvr);
+
+        vcpu3s->sdr1 = sregs->u.s.sdr1;
+        if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
+                for (i = 0; i < 64; i++) {
+                        vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
+                                                    sregs->u.s.ppc64.slb[i].slbe);
+                }
+        } else {
+                for (i = 0; i < 16; i++) {
+                        vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
+                }
+                for (i = 0; i < 8; i++) {
+                        kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
+                                       (u32)sregs->u.s.ppc32.ibat[i]);
+                        kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
+                                       (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
+                        kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
+                                       (u32)sregs->u.s.ppc32.dbat[i]);
+                        kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
+                                       (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
+                }
+        }
+
+        /* Flush the MMU after messing with the segments */
+        kvmppc_mmu_pte_flush(vcpu, 0, 0);
         return 0;
 }