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authorHollis Blanchard <hollisb@us.ibm.com>2008-07-25 14:54:52 -0400
committerAvi Kivity <avi@qumranet.com>2008-10-15 04:15:16 -0400
commit83aae4a8098eb8a40a2e9dab3714354182143b4f (patch)
tree872381c8aa610e3c1053008e967728f121fa55cb /arch/powerpc/kvm/44x_tlb.c
parent20754c2495a791b5b429c0da63394c86ade978e7 (diff)
KVM: ppc: Write only modified shadow entries into the TLB on exit
Track which TLB entries need to be written, instead of overwriting everything below the high water mark. Typically only a single guest TLB entry will be modified in a single exit. Guest boot time performance improvement: about 15%. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch/powerpc/kvm/44x_tlb.c')
-rw-r--r--arch/powerpc/kvm/44x_tlb.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index a207d16b9dbb..06a5fcfc4d33 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -125,6 +125,11 @@ static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
125 } 125 }
126} 126}
127 127
128void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i)
129{
130 vcpu->arch.shadow_tlb_mod[i] = 1;
131}
132
128/* Caller must ensure that the specified guest TLB entry is safe to insert into 133/* Caller must ensure that the specified guest TLB entry is safe to insert into
129 * the shadow TLB. */ 134 * the shadow TLB. */
130void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid, 135void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
@@ -172,10 +177,10 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
172 * use host large pages in the future. */ 177 * use host large pages in the future. */
173 stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS 178 stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
174 | PPC44x_TLB_4K; 179 | PPC44x_TLB_4K;
175
176 stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf); 180 stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
177 stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags, 181 stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
178 vcpu->arch.msr & MSR_PR); 182 vcpu->arch.msr & MSR_PR);
183 kvmppc_tlbe_set_modified(vcpu, victim);
179 184
180 KVMTRACE_5D(STLB_WRITE, vcpu, victim, 185 KVMTRACE_5D(STLB_WRITE, vcpu, victim,
181 stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2, 186 stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2,
@@ -209,6 +214,7 @@ void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
209 214
210 kvmppc_44x_shadow_release(vcpu, i); 215 kvmppc_44x_shadow_release(vcpu, i);
211 stlbe->word0 = 0; 216 stlbe->word0 = 0;
217 kvmppc_tlbe_set_modified(vcpu, i);
212 KVMTRACE_5D(STLB_INVAL, vcpu, i, 218 KVMTRACE_5D(STLB_INVAL, vcpu, i,
213 stlbe->tid, stlbe->word0, stlbe->word1, 219 stlbe->tid, stlbe->word0, stlbe->word1,
214 stlbe->word2, handler); 220 stlbe->word2, handler);
@@ -229,6 +235,7 @@ void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
229 235
230 kvmppc_44x_shadow_release(vcpu, i); 236 kvmppc_44x_shadow_release(vcpu, i);
231 stlbe->word0 = 0; 237 stlbe->word0 = 0;
238 kvmppc_tlbe_set_modified(vcpu, i);
232 KVMTRACE_5D(STLB_INVAL, vcpu, i, 239 KVMTRACE_5D(STLB_INVAL, vcpu, i,
233 stlbe->tid, stlbe->word0, stlbe->word1, 240 stlbe->tid, stlbe->word0, stlbe->word1,
234 stlbe->word2, handler); 241 stlbe->word2, handler);