powerpc/powernv: Cleanup unused MCE definitions/declarations.

Cleanup OpalMCE_* definitions/declarations and other related code which
is not used anymore.

Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Acked-by: Benjamin Herrrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

2 files changed, 0 insertions, 24 deletions

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 9d7dede2847c..c161ef3f28a1 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -726,12 +726,5 @@ int main(void)
                                         arch.timing_last_enter.tv32.tbl));
 #endif
 
-#ifdef CONFIG_PPC_POWERNV
-        DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
-        DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
-        DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
-        DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
-#endif
-
         return 0;
 }
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index a1d45c161e24..ad62f4d6ce31 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1312,23 +1312,6 @@ hmi_exception_after_realmode:
         EXCEPTION_PROLOG_0(PACA_EXGEN)
         b       hmi_exception_hv
 
-#ifdef CONFIG_PPC_POWERNV
-_GLOBAL(opal_mc_secondary_handler)
-        HMT_MEDIUM_PPR_DISCARD
-        SET_SCRATCH0(r13)
-        GET_PACA(r13)
-        clrldi  r3,r3,2
-        tovirt(r3,r3)
-        std     r3,PACA_OPAL_MC_EVT(r13)
-        ld      r13,OPAL_MC_SRR0(r3)
-        mtspr   SPRN_SRR0,r13
-        ld      r13,OPAL_MC_SRR1(r3)
-        mtspr   SPRN_SRR1,r13
-        ld      r3,OPAL_MC_GPR3(r3)
-        GET_SCRATCH0(r13)
-        b       machine_check_pSeries
-#endif /* CONFIG_PPC_POWERNV */
-
 
 #define MACHINE_CHECK_HANDLER_WINDUP                    \
         /* Clear MSR_RI before setting SRR0 and SRR1. */\