powerpc/fsl-booke: Rework TLB CAM code

Re-write the code so its more standalone and fixed some issues:
* Bump'd # of CAM entries to 64 to support e500mc
* Make the code handle MAS7 properly
* Use pr_cont instead of creating a string as we go

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

2 files changed, 0 insertions, 25 deletions

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index e2e2082acf29..a6c2b63227b3 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -421,9 +421,6 @@ int main(void)
         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
         DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 #endif
-#ifdef CONFIG_FSL_BOOKE
-        DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
-#endif
 
 #ifdef CONFIG_KVM_EXIT_TIMING
         DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 975788ca05d2..7f4bd7f3b6af 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -944,28 +944,6 @@ _GLOBAL(__setup_e500mc_ivors)
         blr
 
 /*
- * extern void loadcam_entry(unsigned int index)
- *
- * Load TLBCAM[index] entry in to the L2 CAM MMU
- */
-_GLOBAL(loadcam_entry)
-        lis     r4,TLBCAM@ha
-        addi    r4,r4,TLBCAM@l
-        mulli   r5,r3,TLBCAM_SIZE
-        add     r3,r5,r4
-        lwz     r4,0(r3)
-        mtspr   SPRN_MAS0,r4
-        lwz     r4,4(r3)
-        mtspr   SPRN_MAS1,r4
-        lwz     r4,8(r3)
-        mtspr   SPRN_MAS2,r4
-        lwz     r4,12(r3)
-        mtspr   SPRN_MAS3,r4
-        tlbwe
-        isync
-        blr
-
-/*
  * extern void giveup_altivec(struct task_struct *prev)
  *
  * The e500 core does not have an AltiVec unit.