diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-07-15 17:12:25 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-09-24 17:29:40 -0400 |
commit | 0ba3418b8b1c85ee1771c63f1dd12041614e56ff (patch) | |
tree | 6f77bf668e76725710aae5126054eebd5913d319 /arch/powerpc/kernel | |
parent | 1afb7f809bfb8fad9eec9419f3dfd75cee746ebd (diff) |
powerpc: Introduce local (non-broadcast) forms of tlb invalidates
Introduced a new set of low level tlb invalidate functions that do not
broadcast invalidates on the bus:
_tlbil_all - invalidate all
_tlbil_pid - invalidate based on process id (or mm context)
_tlbil_va - invalidate based on virtual address (ea + pid)
On non-SMP configs _tlbil_all should be functionally equivalent to _tlbia and
_tlbil_va should be functionally equivalent to _tlbie.
The intent of this change is to handle SMP based invalidates via IPIs instead
of broadcasts as the mechanism scales better for larger number of cores.
On e500 (fsl-booke mmu) based cores move to using MMUCSR for invalidate alls
and tlbsx/tlbwe for invalidate virtual address.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/misc_32.S | 54 | ||||
-rw-r--r-- | arch/powerpc/kernel/ppc_ksyms.c | 3 |
2 files changed, 57 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 7a6dfbca7682..e9c8ab6eabfe 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -274,6 +274,10 @@ _GLOBAL(real_writeb) | |||
274 | /* | 274 | /* |
275 | * Flush MMU TLB | 275 | * Flush MMU TLB |
276 | */ | 276 | */ |
277 | #ifndef CONFIG_FSL_BOOKE | ||
278 | _GLOBAL(_tlbil_all) | ||
279 | _GLOBAL(_tlbil_pid) | ||
280 | #endif | ||
277 | _GLOBAL(_tlbia) | 281 | _GLOBAL(_tlbia) |
278 | #if defined(CONFIG_40x) | 282 | #if defined(CONFIG_40x) |
279 | sync /* Flush to memory before changing mapping */ | 283 | sync /* Flush to memory before changing mapping */ |
@@ -344,6 +348,9 @@ _GLOBAL(_tlbia) | |||
344 | /* | 348 | /* |
345 | * Flush MMU TLB for a particular address | 349 | * Flush MMU TLB for a particular address |
346 | */ | 350 | */ |
351 | #ifndef CONFIG_FSL_BOOKE | ||
352 | _GLOBAL(_tlbil_va) | ||
353 | #endif | ||
347 | _GLOBAL(_tlbie) | 354 | _GLOBAL(_tlbie) |
348 | #if defined(CONFIG_40x) | 355 | #if defined(CONFIG_40x) |
349 | /* We run the search with interrupts disabled because we have to change | 356 | /* We run the search with interrupts disabled because we have to change |
@@ -436,6 +443,53 @@ _GLOBAL(_tlbie) | |||
436 | #endif /* ! CONFIG_40x */ | 443 | #endif /* ! CONFIG_40x */ |
437 | blr | 444 | blr |
438 | 445 | ||
446 | #if defined(CONFIG_FSL_BOOKE) | ||
447 | /* | ||
448 | * Flush MMU TLB, but only on the local processor (no broadcast) | ||
449 | */ | ||
450 | _GLOBAL(_tlbil_all) | ||
451 | #define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \ | ||
452 | MMUCSR0_TLB2FI | MMUCSR0_TLB3FI) | ||
453 | li r3,(MMUCSR0_TLBFI)@l | ||
454 | mtspr SPRN_MMUCSR0, r3 | ||
455 | 1: | ||
456 | mfspr r3,SPRN_MMUCSR0 | ||
457 | andi. r3,r3,MMUCSR0_TLBFI@l | ||
458 | bne 1b | ||
459 | blr | ||
460 | |||
461 | /* | ||
462 | * Flush MMU TLB for a particular process id, but only on the local processor | ||
463 | * (no broadcast) | ||
464 | */ | ||
465 | _GLOBAL(_tlbil_pid) | ||
466 | /* we currently do an invalidate all since we don't have per pid invalidate */ | ||
467 | li r3,(MMUCSR0_TLBFI)@l | ||
468 | mtspr SPRN_MMUCSR0, r3 | ||
469 | 1: | ||
470 | mfspr r3,SPRN_MMUCSR0 | ||
471 | andi. r3,r3,MMUCSR0_TLBFI@l | ||
472 | bne 1b | ||
473 | blr | ||
474 | |||
475 | /* | ||
476 | * Flush MMU TLB for a particular address, but only on the local processor | ||
477 | * (no broadcast) | ||
478 | */ | ||
479 | _GLOBAL(_tlbil_va) | ||
480 | slwi r4,r4,16 | ||
481 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ | ||
482 | tlbsx 0,r3 | ||
483 | mfspr r4,SPRN_MAS1 /* check valid */ | ||
484 | andis. r3,r4,MAS1_VALID@h | ||
485 | beqlr | ||
486 | rlwinm r4,r4,0,1,31 | ||
487 | mtspr SPRN_MAS1,r4 | ||
488 | tlbwe | ||
489 | blr | ||
490 | #endif /* CONFIG_FSL_BOOKE */ | ||
491 | |||
492 | |||
439 | /* | 493 | /* |
440 | * Flush instruction cache. | 494 | * Flush instruction cache. |
441 | * This is a no-op on the 601. | 495 | * This is a no-op on the 601. |
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index e1ea4fe5cfbd..8edc2359c419 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c | |||
@@ -119,6 +119,9 @@ EXPORT_SYMBOL(flush_instruction_cache); | |||
119 | EXPORT_SYMBOL(flush_tlb_kernel_range); | 119 | EXPORT_SYMBOL(flush_tlb_kernel_range); |
120 | EXPORT_SYMBOL(flush_tlb_page); | 120 | EXPORT_SYMBOL(flush_tlb_page); |
121 | EXPORT_SYMBOL(_tlbie); | 121 | EXPORT_SYMBOL(_tlbie); |
122 | #if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE) | ||
123 | EXPORT_SYMBOL(_tlbil_va); | ||
124 | #endif | ||
122 | #endif | 125 | #endif |
123 | EXPORT_SYMBOL(__flush_icache_range); | 126 | EXPORT_SYMBOL(__flush_icache_range); |
124 | EXPORT_SYMBOL(flush_dcache_range); | 127 | EXPORT_SYMBOL(flush_dcache_range); |