Merge branch 'for-2.6.24' of master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge

4 files changed, 88 insertions, 15 deletions

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index d3fb7d0c6c1c..9ed351f3c966 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1104,6 +1104,16 @@ static struct cpu_spec __initdata cpu_specs[] = {
         {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x40000850,
+                .cpu_name               = "440GR Rev. A",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .platform               = "ppc440",
+        },
+        { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
+                .pvr_mask               = 0xf0000fff,
+                .pvr_value              = 0x40000858,
                 .cpu_name               = "440EP Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
@@ -1115,28 +1125,27 @@ static struct cpu_spec __initdata cpu_specs[] = {
         {
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x400008d3,
-                .cpu_name               = "440EP Rev. B",
+                .cpu_name               = "440GR Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
-                .cpu_setup              = __setup_cpu_440ep,
                 .platform               = "ppc440",
         },
-        { /* 440EPX */
-                .pvr_mask               = 0xf0000ffb,
-                .pvr_value              = 0x200008D0,
-                .cpu_name               = "440EPX",
+        { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
+                .pvr_mask               = 0xf0000fff,
+                .pvr_value              = 0x400008db,
+                .cpu_name               = "440EP Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
-                .cpu_setup              = __setup_cpu_440epx,
+                .cpu_setup              = __setup_cpu_440ep,
                 .platform               = "ppc440",
         },
         { /* 440GRX */
                 .pvr_mask               = 0xf0000ffb,
-                .pvr_value              = 0x200008D8,
+                .pvr_value              = 0x200008D0,
                 .cpu_name               = "440GRX",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
@@ -1145,6 +1154,17 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_setup              = __setup_cpu_440grx,
                 .platform               = "ppc440",
         },
+        { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
+                .pvr_mask               = 0xf0000ffb,
+                .pvr_value              = 0x200008D8,
+                .cpu_name               = "440EPX",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .cpu_setup              = __setup_cpu_440epx,
+                .platform               = "ppc440",
+        },
         {       /* 440GP Rev. B */
                 .pvr_mask               = 0xf0000fff,
                 .pvr_value              = 0x40000440,
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 21d889e63e87..a7572cf464bd 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -244,6 +244,13 @@ syscall_exit_cont:
         andis.  r10,r0,DBCR0_IC@h
         bnel-   load_dbcr0
 #endif
+#ifdef CONFIG_44x
+        lis     r4,icache_44x_need_flush@ha
+        lwz     r5,icache_44x_need_flush@l(r4)
+        cmplwi  cr0,r5,0
+        bne-    2f
+1:
+#endif /* CONFIG_44x */
         stwcx.  r0,0,r1                 /* to clear the reservation */
         lwz     r4,_LINK(r1)
         lwz     r5,_CCR(r1)
@@ -258,6 +265,12 @@ syscall_exit_cont:
         mtspr   SPRN_SRR1,r8
         SYNC
         RFI
+#ifdef CONFIG_44x
+2:      li      r7,0
+        iccci   r0,r0
+        stw     r7,icache_44x_need_flush@l(r4)
+        b       1b
+#endif  /* CONFIG_44x */
 
 66:     li      r3,-ENOSYS
         b       ret_from_syscall
@@ -683,6 +696,16 @@ resume_kernel:
 
         /* interrupts are hard-disabled at this point */
 restore:
+#ifdef CONFIG_44x
+        lis     r4,icache_44x_need_flush@ha
+        lwz     r5,icache_44x_need_flush@l(r4)
+        cmplwi  cr0,r5,0
+        beq+    1f
+        li      r6,0
+        iccci   r0,r0
+        stw     r6,icache_44x_need_flush@l(r4)
+1:
+#endif  /* CONFIG_44x */
         lwz     r0,GPR0(r1)
         lwz     r2,GPR2(r1)
         REST_4GPRS(3, r1)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 8533de50347d..8b642ab26d37 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -288,7 +288,16 @@ _GLOBAL(_tlbia)
  */
 _GLOBAL(_tlbie)
 #if defined(CONFIG_40x)
+        /* We run the search with interrupts disabled because we have to change
+         * the PID and I don't want to preempt when that happens.
+         */
+        mfmsr   r5
+        mfspr   r6,SPRN_PID
+        wrteei  0
+        mtspr   SPRN_PID,r4
         tlbsx.  r3, 0, r3
+        mtspr   SPRN_PID,r6
+        wrtee   r5
         bne     10f
         sync
         /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
@@ -297,23 +306,23 @@ _GLOBAL(_tlbie)
         tlbwe   r3, r3, TLB_TAG
         isync
 10:
+
 #elif defined(CONFIG_44x)
-        mfspr   r4,SPRN_MMUCR
-        mfspr   r5,SPRN_PID                     /* Get PID */
-        rlwimi  r4,r5,0,24,31                   /* Set TID */
+        mfspr   r5,SPRN_MMUCR
+        rlwimi  r5,r4,0,24,31                   /* Set TID */
 
         /* We have to run the search with interrupts disabled, even critical
          * and debug interrupts (in fact the only critical exceptions we have
          * are debug and machine check).  Otherwise  an interrupt which causes
          * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
-        mfmsr   r5
+        mfmsr   r4
         lis     r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
         addi    r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
-        andc    r6,r5,r6
+        andc    r6,r4,r6
         mtmsr   r6
-        mtspr   SPRN_MMUCR,r4
+        mtspr   SPRN_MMUCR,r5
         tlbsx.  r3, 0, r3
-        mtmsr   r5
+        mtmsr   r4
         bne     10f
         sync
         /* There are only 64 TLB entries, so r3 < 64,
@@ -534,12 +543,21 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
         addi    r3,r3,L1_CACHE_BYTES
         bdnz    0b
         sync
+#ifndef CONFIG_44x
+        /* We don't flush the icache on 44x. Those have a virtual icache
+         * and we don't have access to the virtual address here (it's
+         * not the page vaddr but where it's mapped in user space). The
+         * flushing of the icache on these is handled elsewhere, when
+         * a change in the address space occurs, before returning to
+         * user space
+         */
         mtctr   r4
 1:      icbi    0,r6
         addi    r6,r6,L1_CACHE_BYTES
         bdnz    1b
         sync
         isync
+#endif /* CONFIG_44x */
         blr
 
 /*
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9f329a8928ea..acc0d247d3c3 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -697,6 +697,18 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                 prop = of_get_flat_dt_prop(node, "cpu-version", NULL);
                 if (prop && (*prop & 0xff000000) == 0x0f000000)
                         identify_cpu(0, *prop);
+#if defined(CONFIG_44x) && defined(CONFIG_PPC_FPU)
+                /*
+                 * Since 440GR(x)/440EP(x) processors have the same pvr,
+                 * we check the node path and set bit 28 in the cur_cpu_spec
+                 * pvr for EP(x) processor version. This bit is always 0 in
+                 * the "real" pvr. Then we call identify_cpu again with
+                 * the new logical pvr to enable FPU support.
+                 */
+                if (strstr(uname, "440EP")) {
+                        identify_cpu(0, cur_cpu_spec->pvr_value | 0x8);
+                }
+#endif
         }
 
         check_cpu_feature_properties(node);