powerpc: Free up some CPU feature bits by moving out MMU-related features

Some of the 64bit PPC CPU features are MMU-related, so this patch moves
them to MMU_FTR_ bits.  All cpu_has_feature()-style tests are moved to
mmu_has_feature(), and seven feature bits are freed as a result.

Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

6 files changed, 38 insertions, 42 deletions

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 3d7b65ad4962..34d2722b9451 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -201,7 +201,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER4 (gp)",
                 .cpu_features           = CPU_FTRS_POWER4,
                 .cpu_user_features      = COMMON_USER_POWER4,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER4,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -216,7 +216,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER4+ (gq)",
                 .cpu_features           = CPU_FTRS_POWER4,
                 .cpu_user_features      = COMMON_USER_POWER4,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER4,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -232,7 +232,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -250,7 +250,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -286,7 +286,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -304,7 +304,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_PPC970,
                 .cpu_user_features      = COMMON_USER_POWER4 |
                         PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 8,
@@ -320,7 +320,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5 (gr)",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -340,7 +340,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5+ (gs)",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5_PLUS,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -356,7 +356,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5+ (gs)",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5_PLUS,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -373,7 +373,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER5+",
                 .cpu_features           = CPU_FTRS_POWER5,
                 .cpu_user_features      = COMMON_USER_POWER5_PLUS,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
@@ -387,7 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_features           = CPU_FTRS_POWER6,
                 .cpu_user_features      = COMMON_USER_POWER6 |
                         PPC_FEATURE_POWER6_EXT,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER6,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -406,7 +406,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER6 (architected)",
                 .cpu_features           = CPU_FTRS_POWER6,
                 .cpu_user_features      = COMMON_USER_POWER6,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER6,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
@@ -419,8 +419,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER7 (architected)",
                 .cpu_features           = CPU_FTRS_POWER7,
                 .cpu_user_features      = COMMON_USER_POWER7,
-                .mmu_features           = MMU_FTR_HPTE_TABLE |
-                        MMU_FTR_TLBIE_206,
+                .mmu_features           = MMU_FTRS_POWER7,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .oprofile_type          = PPC_OPROFILE_POWER4,
@@ -435,8 +434,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER7 (raw)",
                 .cpu_features           = CPU_FTRS_POWER7,
                 .cpu_user_features      = COMMON_USER_POWER7,
-                .mmu_features           = MMU_FTR_HPTE_TABLE |
-                        MMU_FTR_TLBIE_206,
+                .mmu_features           = MMU_FTRS_POWER7,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -453,8 +451,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER7+ (raw)",
                 .cpu_features           = CPU_FTRS_POWER7,
                 .cpu_user_features      = COMMON_USER_POWER7,
-                .mmu_features           = MMU_FTR_HPTE_TABLE |
-                        MMU_FTR_TLBIE_206,
+                .mmu_features           = MMU_FTRS_POWER7,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -473,7 +470,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_user_features      = COMMON_USER_PPC64 |
                         PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
                         PPC_FEATURE_SMT,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_CELL,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 4,
@@ -488,7 +485,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "PA6T",
                 .cpu_features           = CPU_FTRS_PA6T,
                 .cpu_user_features      = COMMON_USER_PA6T,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PA6T,
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 6,
@@ -505,7 +502,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "POWER4 (compatible)",
                 .cpu_features           = CPU_FTRS_COMPATIBLE,
                 .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
                 .icache_bsize           = 128,
                 .dcache_bsize           = 128,
                 .num_pmcs               = 6,
@@ -2020,11 +2017,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "A2 (>= DD2)",
                 .cpu_features           = CPU_FTRS_A2,
                 .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
-                                          MMU_FTR_USE_TLBIVAX_BCAST |
-                                          MMU_FTR_LOCK_BCAST_INVAL |
-                                          MMU_FTR_USE_TLBRSRV |
-                                          MMU_FTR_USE_PAIRED_MAS,
+                .mmu_features           = MMU_FTRS_A2,
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 0,
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 64693706ebfd..d834425186ae 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -468,10 +468,10 @@ BEGIN_FTR_SECTION
   FTR_SECTION_ELSE_NESTED(95)
         clrrdi  r6,r8,40        /* get its 1T ESID */
         clrrdi  r9,r1,40        /* get current sp 1T ESID */
-  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95)
+  ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_1T_SEGMENT, 95)
 FTR_SECTION_ELSE
         b       2f
-ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB)
+ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_SLB)
         clrldi. r0,r6,2         /* is new ESID c00000000? */
         cmpd    cr1,r6,r9       /* or is new ESID the same as current ESID? */
         cror    eq,4*cr1+eq,eq
@@ -485,7 +485,7 @@ BEGIN_FTR_SECTION
         li      r9,MMU_SEGSIZE_1T       /* insert B field */
         oris    r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
         rldimi  r7,r9,SLB_VSID_SSIZE_SHIFT,0
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
 
         /* Update the last bolted SLB.  No write barriers are needed
          * here, provided we only update the current CPU's SLB shadow
@@ -497,7 +497,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
         std     r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
         std     r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
 
-        /* No need to check for CPU_FTR_NO_SLBIE_B here, since when
+        /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
          * we have 1TB segments, the only CPUs known to have the errata
          * only support less than 1TB of system memory and we'll never
          * actually hit this code path.
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index ad06333631ac..226cc8c62224 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -102,7 +102,7 @@ BEGIN_FTR_SECTION
         EXCEPTION_PROLOG_PSERIES_1(data_access_common, EXC_STD)
 FTR_SECTION_ELSE
         EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD)
-ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_SLB)
 
         . = 0x380
         .globl data_access_slb_pSeries
@@ -840,7 +840,7 @@ _STATIC(do_hash_page)
 BEGIN_FTR_SECTION
         andis.  r0,r4,0x0020            /* Is it a segment table fault? */
         bne-    do_ste_alloc            /* If so handle it */
-END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
 
         clrrdi  r11,r1,THREAD_SHIFT
         lwz     r0,TI_PREEMPT(r11)      /* If we're in an "NMI" */
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index a01c2d93fd2f..095043d79946 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -757,11 +757,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
                                 _ALIGN_UP(sizeof(struct thread_info), 16);
 
 #ifdef CONFIG_PPC_STD_MMU_64
-        if (cpu_has_feature(CPU_FTR_SLB)) {
+        if (mmu_has_feature(MMU_FTR_SLB)) {
                 unsigned long sp_vsid;
                 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
 
-                if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
+                if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
                         sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
                                 << SLB_VSID_SHIFT_1T;
                 else
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index c391dc4c8bad..5f5e6aed2b70 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -123,18 +123,19 @@ static void __init move_device_tree(void)
  */
 static struct ibm_pa_feature {
         unsigned long   cpu_features;   /* CPU_FTR_xxx bit */
+        unsigned long   mmu_features;   /* MMU_FTR_xxx bit */
         unsigned int    cpu_user_ftrs;  /* PPC_FEATURE_xxx bit */
         unsigned char   pabyte;         /* byte number in ibm,pa-features */
         unsigned char   pabit;          /* bit number (big-endian) */
         unsigned char   invert;         /* if 1, pa bit set => clear feature */
 } ibm_pa_features[] __initdata = {
-        {0, PPC_FEATURE_HAS_MMU,        0, 0, 0},
-        {0, PPC_FEATURE_HAS_FPU,        0, 1, 0},
-        {CPU_FTR_SLB, 0,                0, 2, 0},
-        {CPU_FTR_CTRL, 0,               0, 3, 0},
-        {CPU_FTR_NOEXECUTE, 0,          0, 6, 0},
-        {CPU_FTR_NODSISRALIGN, 0,       1, 1, 1},
-        {CPU_FTR_CI_LARGE_PAGE, 0,      1, 2, 0},
+        {0, 0, PPC_FEATURE_HAS_MMU,     0, 0, 0},
+        {0, 0, PPC_FEATURE_HAS_FPU,     0, 1, 0},
+        {0, MMU_FTR_SLB, 0,             0, 2, 0},
+        {CPU_FTR_CTRL, 0, 0,            0, 3, 0},
+        {CPU_FTR_NOEXECUTE, 0, 0,       0, 6, 0},
+        {CPU_FTR_NODSISRALIGN, 0, 0,    1, 1, 1},
+        {0, MMU_FTR_CI_LARGE_PAGE, 0,   1, 2, 0},
         {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
 };
 
@@ -166,9 +167,11 @@ static void __init scan_features(unsigned long node, unsigned char *ftrs,
                 if (bit ^ fp->invert) {
                         cur_cpu_spec->cpu_features |= fp->cpu_features;
                         cur_cpu_spec->cpu_user_features |= fp->cpu_user_ftrs;
+                        cur_cpu_spec->mmu_features |= fp->mmu_features;
                 } else {
                         cur_cpu_spec->cpu_features &= ~fp->cpu_features;
                         cur_cpu_spec->cpu_user_features &= ~fp->cpu_user_ftrs;
+                        cur_cpu_spec->mmu_features &= ~fp->mmu_features;
                 }
         }
 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 91a5cc5f0d02..959c63cf62e4 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -436,7 +436,7 @@ void __init setup_system(void)
 
 static u64 slb0_limit(void)
 {
-        if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
+        if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) {
                 return 1UL << SID_SHIFT_1T;
         }
         return 1UL << SID_SHIFT;