diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-01-20 02:50:55 -0500 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-04-19 21:03:22 -0400 |
commit | 24cc67de62eebbda3ce0c46bdd56582c00dccd03 (patch) | |
tree | 7096191238ff09ab7a903674448cbf9e71c30f77 /arch/powerpc/kernel | |
parent | f6e17f9b0bf172a5813dfef0c03d0a25ba83b0de (diff) |
powerpc: Define CPU feature for Architected 2.06 HV mode
This bit indicates that we are operating in hypervisor mode on a CPU
compliant to architecture 2.06 or later (currently server only).
We set it on POWER7 and have a boot-time CPU setup function that
clears it if MSR:HV isn't set (booting under a hypervisor).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_power7.S | 65 | ||||
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 6 |
3 files changed, 72 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 3bb2a3e6a337..7c6eb4974f25 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -38,6 +38,7 @@ obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \ | |||
38 | paca.o nvram_64.o firmware.o | 38 | paca.o nvram_64.o firmware.o |
39 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o | 39 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o |
40 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o | 40 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_ppc970.o cpu_setup_pa6t.o |
41 | obj-$(CONFIG_PPC_BOOK3S_64) += cpu_setup_power7.o | ||
41 | obj64-$(CONFIG_RELOCATABLE) += reloc_64.o | 42 | obj64-$(CONFIG_RELOCATABLE) += reloc_64.o |
42 | obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o | 43 | obj-$(CONFIG_PPC_BOOK3E_64) += exceptions-64e.o idle_book3e.o |
43 | obj-$(CONFIG_PPC64) += vdso64/ | 44 | obj-$(CONFIG_PPC64) += vdso64/ |
diff --git a/arch/powerpc/kernel/cpu_setup_power7.S b/arch/powerpc/kernel/cpu_setup_power7.S new file mode 100644 index 000000000000..f2b317817c4e --- /dev/null +++ b/arch/powerpc/kernel/cpu_setup_power7.S | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * This file contains low level CPU setup functions. | ||
3 | * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org) | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #include <asm/processor.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/cputable.h> | ||
15 | #include <asm/ppc_asm.h> | ||
16 | #include <asm/asm-offsets.h> | ||
17 | #include <asm/cache.h> | ||
18 | |||
19 | /* Entry: r3 = crap, r4 = ptr to cputable entry | ||
20 | * | ||
21 | * Note that we can be called twice for pseudo-PVRs | ||
22 | */ | ||
23 | _GLOBAL(__setup_cpu_power7) | ||
24 | mflr r11 | ||
25 | bl __init_hvmode_206 | ||
26 | mtlr r11 | ||
27 | beqlr | ||
28 | bl __init_LPCR | ||
29 | mtlr r11 | ||
30 | blr | ||
31 | |||
32 | _GLOBAL(__restore_cpu_power7) | ||
33 | mflr r11 | ||
34 | mfmsr r3 | ||
35 | rldicl. r0,r3,4,63 | ||
36 | beqlr | ||
37 | bl __init_LPCR | ||
38 | mtlr r11 | ||
39 | blr | ||
40 | |||
41 | __init_hvmode_206: | ||
42 | /* Disable CPU_FTR_HVMODE_206 and exit if MSR:HV is not set */ | ||
43 | mfmsr r3 | ||
44 | rldicl. r0,r3,4,63 | ||
45 | bnelr | ||
46 | ld r5,CPU_SPEC_FEATURES(r4) | ||
47 | LOAD_REG_IMMEDIATE(r6,CPU_FTR_HVMODE_206) | ||
48 | xor r5,r5,r6 | ||
49 | std r5,CPU_SPEC_FEATURES(r4) | ||
50 | blr | ||
51 | |||
52 | __init_LPCR: | ||
53 | /* Setup a sane LPCR: | ||
54 | * | ||
55 | * LPES = 0b11 (SRR0/1 used for 0x500) | ||
56 | * PECE = 0b111 | ||
57 | * | ||
58 | * Other bits untouched for now | ||
59 | */ | ||
60 | mfspr r3,SPRN_LPCR | ||
61 | ori r3,r3,(LPCR_LPES0|LPCR_LPES1) | ||
62 | ori r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2) | ||
63 | mtspr SPRN_LPCR,r3 | ||
64 | isync | ||
65 | blr | ||
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index b9602ee06deb..b65b4908d3c7 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -423,6 +423,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
423 | .dcache_bsize = 128, | 423 | .dcache_bsize = 128, |
424 | .oprofile_type = PPC_OPROFILE_POWER4, | 424 | .oprofile_type = PPC_OPROFILE_POWER4, |
425 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", | 425 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
426 | .cpu_setup = __setup_cpu_power7, | ||
427 | .cpu_restore = __restore_cpu_power7, | ||
426 | .platform = "power7", | 428 | .platform = "power7", |
427 | }, | 429 | }, |
428 | { /* Power7 */ | 430 | { /* Power7 */ |
@@ -439,6 +441,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
439 | .pmc_type = PPC_PMC_IBM, | 441 | .pmc_type = PPC_PMC_IBM, |
440 | .oprofile_cpu_type = "ppc64/power7", | 442 | .oprofile_cpu_type = "ppc64/power7", |
441 | .oprofile_type = PPC_OPROFILE_POWER4, | 443 | .oprofile_type = PPC_OPROFILE_POWER4, |
444 | .cpu_setup = __setup_cpu_power7, | ||
445 | .cpu_restore = __restore_cpu_power7, | ||
442 | .platform = "power7", | 446 | .platform = "power7", |
443 | }, | 447 | }, |
444 | { /* Power7+ */ | 448 | { /* Power7+ */ |
@@ -455,6 +459,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
455 | .pmc_type = PPC_PMC_IBM, | 459 | .pmc_type = PPC_PMC_IBM, |
456 | .oprofile_cpu_type = "ppc64/power7", | 460 | .oprofile_cpu_type = "ppc64/power7", |
457 | .oprofile_type = PPC_OPROFILE_POWER4, | 461 | .oprofile_type = PPC_OPROFILE_POWER4, |
462 | .cpu_setup = __setup_cpu_power7, | ||
463 | .cpu_restore = __restore_cpu_power7, | ||
458 | .platform = "power7+", | 464 | .platform = "power7+", |
459 | }, | 465 | }, |
460 | { /* Cell Broadband Engine */ | 466 | { /* Cell Broadband Engine */ |