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authorValentine Barshak <vbarshak@ru.mvista.com>2007-08-29 09:40:30 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-09-07 08:49:13 -0400
commit15fc993e31293f9b179eb5f08b18a4a4f2ca648a (patch)
tree1980855d74027e832cc787e7b3717a2cc778f9eb /arch/powerpc/kernel
parent38a5d6c9e79c2dbf3b23fb6fe8c2b51551bc9ee3 (diff)
[POWERPC] PowerPC 440EPx: Sequoia board support
AMCC PPC440EPx Sequoia board support. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/cputable.c18
-rw-r--r--arch/powerpc/kernel/head_44x.S2
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b1f8000952f3..5873073c9045 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1132,6 +1132,24 @@ static struct cpu_spec cpu_specs[] = {
1132 .dcache_bsize = 32, 1132 .dcache_bsize = 32,
1133 .platform = "ppc440", 1133 .platform = "ppc440",
1134 }, 1134 },
1135 { /* 440EPX */
1136 .pvr_mask = 0xf0000ffb,
1137 .pvr_value = 0x200008D0,
1138 .cpu_name = "440EPX",
1139 .cpu_features = CPU_FTRS_44X,
1140 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1141 .icache_bsize = 32,
1142 .dcache_bsize = 32,
1143 },
1144 { /* 440GRX */
1145 .pvr_mask = 0xf0000ffb,
1146 .pvr_value = 0x200008D8,
1147 .cpu_name = "440GRX",
1148 .cpu_features = CPU_FTRS_44X,
1149 .cpu_user_features = COMMON_USER_BOOKE,
1150 .icache_bsize = 32,
1151 .dcache_bsize = 32,
1152 },
1135 { /* 440GP Rev. B */ 1153 { /* 440GP Rev. B */
1136 .pvr_mask = 0xf0000fff, 1154 .pvr_mask = 0xf0000fff,
1137 .pvr_value = 0x40000440, 1155 .pvr_value = 0x40000440,
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 88695963f587..e26d26e31813 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -217,7 +217,7 @@ skpinv: addi r4,r4,1 /* Increment */
217 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ 217 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
218 mtspr SPRN_IVPR,r4 218 mtspr SPRN_IVPR,r4
219 219
220#ifdef CONFIG_440EP 220#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
221 /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */ 221 /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
222 mfspr r2,SPRN_CCR0 222 mfspr r2,SPRN_CCR0
223 lis r3,0xffef 223 lis r3,0xffef