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authorPaul Mackerras <paulus@samba.org>2005-11-09 22:29:18 -0500
committerPaul Mackerras <paulus@samba.org>2005-11-09 22:29:18 -0500
commita7ddc5e85351931b67a48afa22788d77763837d8 (patch)
tree4b7b6ff70432f43e3aeab101445d74f0fd012722 /arch/powerpc/kernel
parentcbe62e2b4a764aa3f9a2b9c9004f8e86a1f0ade8 (diff)
powerpc: Add user CPU features for POWER4, POWER5, POWER5+ and Cell.
This is at the request of the glibc folks, who want to use these bits to select libraries optimized for the microarchitecture and new instructions in these processors. Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/cputable.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index cc4e9eb1c13f..1d85cedbbb7b 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -52,6 +52,9 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
52#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 52#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
53 PPC_FEATURE_HAS_MMU) 53 PPC_FEATURE_HAS_MMU)
54#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 54#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
55#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
56#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5)
57#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS)
55 58
56 59
57/* We only set the spe features if the kernel was compiled with 60/* We only set the spe features if the kernel was compiled with
@@ -160,7 +163,7 @@ struct cpu_spec cpu_specs[] = {
160 .pvr_value = 0x00350000, 163 .pvr_value = 0x00350000,
161 .cpu_name = "POWER4 (gp)", 164 .cpu_name = "POWER4 (gp)",
162 .cpu_features = CPU_FTRS_POWER4, 165 .cpu_features = CPU_FTRS_POWER4,
163 .cpu_user_features = COMMON_USER_PPC64, 166 .cpu_user_features = COMMON_USER_POWER4,
164 .icache_bsize = 128, 167 .icache_bsize = 128,
165 .dcache_bsize = 128, 168 .dcache_bsize = 128,
166 .num_pmcs = 8, 169 .num_pmcs = 8,
@@ -175,7 +178,7 @@ struct cpu_spec cpu_specs[] = {
175 .pvr_value = 0x00380000, 178 .pvr_value = 0x00380000,
176 .cpu_name = "POWER4+ (gq)", 179 .cpu_name = "POWER4+ (gq)",
177 .cpu_features = CPU_FTRS_POWER4, 180 .cpu_features = CPU_FTRS_POWER4,
178 .cpu_user_features = COMMON_USER_PPC64, 181 .cpu_user_features = COMMON_USER_POWER4,
179 .icache_bsize = 128, 182 .icache_bsize = 128,
180 .dcache_bsize = 128, 183 .dcache_bsize = 128,
181 .num_pmcs = 8, 184 .num_pmcs = 8,
@@ -190,7 +193,7 @@ struct cpu_spec cpu_specs[] = {
190 .pvr_value = 0x00390000, 193 .pvr_value = 0x00390000,
191 .cpu_name = "PPC970", 194 .cpu_name = "PPC970",
192 .cpu_features = CPU_FTRS_PPC970, 195 .cpu_features = CPU_FTRS_PPC970,
193 .cpu_user_features = COMMON_USER_PPC64 | 196 .cpu_user_features = COMMON_USER_POWER4 |
194 PPC_FEATURE_HAS_ALTIVEC_COMP, 197 PPC_FEATURE_HAS_ALTIVEC_COMP,
195 .icache_bsize = 128, 198 .icache_bsize = 128,
196 .dcache_bsize = 128, 199 .dcache_bsize = 128,
@@ -212,7 +215,7 @@ struct cpu_spec cpu_specs[] = {
212#else 215#else
213 .cpu_features = CPU_FTRS_PPC970, 216 .cpu_features = CPU_FTRS_PPC970,
214#endif 217#endif
215 .cpu_user_features = COMMON_USER_PPC64 | 218 .cpu_user_features = COMMON_USER_POWER4 |
216 PPC_FEATURE_HAS_ALTIVEC_COMP, 219 PPC_FEATURE_HAS_ALTIVEC_COMP,
217 .icache_bsize = 128, 220 .icache_bsize = 128,
218 .dcache_bsize = 128, 221 .dcache_bsize = 128,
@@ -230,7 +233,7 @@ struct cpu_spec cpu_specs[] = {
230 .pvr_value = 0x00440000, 233 .pvr_value = 0x00440000,
231 .cpu_name = "PPC970MP", 234 .cpu_name = "PPC970MP",
232 .cpu_features = CPU_FTRS_PPC970, 235 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_PPC64 | 236 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP, 237 PPC_FEATURE_HAS_ALTIVEC_COMP,
235 .icache_bsize = 128, 238 .icache_bsize = 128,
236 .dcache_bsize = 128, 239 .dcache_bsize = 128,
@@ -245,7 +248,7 @@ struct cpu_spec cpu_specs[] = {
245 .pvr_value = 0x003a0000, 248 .pvr_value = 0x003a0000,
246 .cpu_name = "POWER5 (gr)", 249 .cpu_name = "POWER5 (gr)",
247 .cpu_features = CPU_FTRS_POWER5, 250 .cpu_features = CPU_FTRS_POWER5,
248 .cpu_user_features = COMMON_USER_PPC64, 251 .cpu_user_features = COMMON_USER_POWER5,
249 .icache_bsize = 128, 252 .icache_bsize = 128,
250 .dcache_bsize = 128, 253 .dcache_bsize = 128,
251 .num_pmcs = 6, 254 .num_pmcs = 6,
@@ -260,7 +263,7 @@ struct cpu_spec cpu_specs[] = {
260 .pvr_value = 0x003b0000, 263 .pvr_value = 0x003b0000,
261 .cpu_name = "POWER5 (gs)", 264 .cpu_name = "POWER5 (gs)",
262 .cpu_features = CPU_FTRS_POWER5, 265 .cpu_features = CPU_FTRS_POWER5,
263 .cpu_user_features = COMMON_USER_PPC64, 266 .cpu_user_features = COMMON_USER_POWER5_PLUS,
264 .icache_bsize = 128, 267 .icache_bsize = 128,
265 .dcache_bsize = 128, 268 .dcache_bsize = 128,
266 .num_pmcs = 6, 269 .num_pmcs = 6,
@@ -276,7 +279,7 @@ struct cpu_spec cpu_specs[] = {
276 .cpu_name = "Cell Broadband Engine", 279 .cpu_name = "Cell Broadband Engine",
277 .cpu_features = CPU_FTRS_CELL, 280 .cpu_features = CPU_FTRS_CELL,
278 .cpu_user_features = COMMON_USER_PPC64 | 281 .cpu_user_features = COMMON_USER_PPC64 |
279 PPC_FEATURE_HAS_ALTIVEC_COMP, 282 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP,
280 .icache_bsize = 128, 283 .icache_bsize = 128,
281 .dcache_bsize = 128, 284 .dcache_bsize = 128,
282 .cpu_setup = __setup_cpu_be, 285 .cpu_setup = __setup_cpu_be,