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authorDavid Gibson <david@gibson.dropbear.id.au>2005-11-08 21:38:01 -0500
committerPaul Mackerras <paulus@samba.org>2005-11-09 19:24:04 -0500
commit8882a4da1c932c9f311c9f739e6719adea3e25d9 (patch)
tree1cf5e23780468d35305cde874f31c6223693908f /arch/powerpc/kernel
parent584224e4095d8abcf2bef38efacc291be9a44c20 (diff)
[PATCH] powerpc: Move various ppc64 files with no ppc32 equivalent to powerpc
This patch moves a bunch of files from arch/ppc64 and include/asm-ppc64 which have no equivalents in ppc32 code into arch/powerpc and include/asm-powerpc. The file affected are: abs_addr.h compat.h lppaca.h paca.h tce.h cpu_setup_power4.S ioctl32.c firmware.c pacaData.c The only changes apart from the move and corresponding Makefile changes are: - #ifndef/#define in includes updated to _ASM_POWERPC_ form - trailing whitespace removed - comments giving full paths removed - pacaData.c renamed paca.c to remove studlyCaps - Misplaced { moved in lppaca.h Built and booted on POWER5 LPAR (ARCH=powerpc and ARCH=ppc64), built for 32-bit powermac (ARCH=powerpc). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/Makefile5
-rw-r--r--arch/powerpc/kernel/cpu_setup_power4.S233
-rw-r--r--arch/powerpc/kernel/firmware.c45
-rw-r--r--arch/powerpc/kernel/ioctl32.c49
-rw-r--r--arch/powerpc/kernel/paca.c143
5 files changed, 474 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index b3ae2993efb8..103cb8128ef4 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -4,6 +4,7 @@
4 4
5ifeq ($(CONFIG_PPC64),y) 5ifeq ($(CONFIG_PPC64),y)
6EXTRA_CFLAGS += -mno-minimal-toc 6EXTRA_CFLAGS += -mno-minimal-toc
7CFLAGS_ioctl32.o += -Ifs/
7endif 8endif
8ifeq ($(CONFIG_PPC32),y) 9ifeq ($(CONFIG_PPC32),y)
9CFLAGS_prom_init.o += -fPIC 10CFLAGS_prom_init.o += -fPIC
@@ -13,7 +14,9 @@ endif
13obj-y := semaphore.o cputable.o ptrace.o syscalls.o \ 14obj-y := semaphore.o cputable.o ptrace.o syscalls.o \
14 signal_32.o pmc.o 15 signal_32.o pmc.o
15obj-$(CONFIG_PPC64) += setup_64.o binfmt_elf32.o sys_ppc32.o \ 16obj-$(CONFIG_PPC64) += setup_64.o binfmt_elf32.o sys_ppc32.o \
16 signal_64.o ptrace32.o systbl.o 17 signal_64.o ptrace32.o systbl.o \
18 paca.o ioctl32.o cpu_setup_power4.o \
19 firmware.o
17obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o 20obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
18obj-$(CONFIG_POWER4) += idle_power4.o 21obj-$(CONFIG_POWER4) += idle_power4.o
19obj-$(CONFIG_PPC_OF) += of_device.o 22obj-$(CONFIG_PPC_OF) += of_device.o
diff --git a/arch/powerpc/kernel/cpu_setup_power4.S b/arch/powerpc/kernel/cpu_setup_power4.S
new file mode 100644
index 000000000000..cca942fe6115
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_power4.S
@@ -0,0 +1,233 @@
1/*
2 * This file contains low level CPU setup functions.
3 * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 */
11
12#include <linux/config.h>
13#include <asm/processor.h>
14#include <asm/page.h>
15#include <asm/cputable.h>
16#include <asm/ppc_asm.h>
17#include <asm/asm-offsets.h>
18#include <asm/cache.h>
19
20_GLOBAL(__970_cpu_preinit)
21 /*
22 * Do nothing if not running in HV mode
23 */
24 mfmsr r0
25 rldicl. r0,r0,4,63
26 beqlr
27
28 /*
29 * Deal only with PPC970 and PPC970FX.
30 */
31 mfspr r0,SPRN_PVR
32 srwi r0,r0,16
33 cmpwi r0,0x39
34 beq 1f
35 cmpwi r0,0x3c
36 beq 1f
37 cmpwi r0,0x44
38 bnelr
391:
40
41 /* Make sure HID4:rm_ci is off before MMU is turned off, that large
42 * pages are enabled with HID4:61 and clear HID5:DCBZ_size and
43 * HID5:DCBZ32_ill
44 */
45 li r0,0
46 mfspr r3,SPRN_HID4
47 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
48 rldimi r3,r0,2,61 /* clear bit 61 (lg_pg_en) */
49 sync
50 mtspr SPRN_HID4,r3
51 isync
52 sync
53 mfspr r3,SPRN_HID5
54 rldimi r3,r0,6,56 /* clear bits 56 & 57 (DCBZ*) */
55 sync
56 mtspr SPRN_HID5,r3
57 isync
58 sync
59
60 /* Setup some basic HID1 features */
61 mfspr r0,SPRN_HID1
62 li r3,0x1200 /* enable i-fetch cacheability */
63 sldi r3,r3,44 /* and prefetch */
64 or r0,r0,r3
65 mtspr SPRN_HID1,r0
66 mtspr SPRN_HID1,r0
67 isync
68
69 /* Clear HIOR */
70 li r0,0
71 sync
72 mtspr SPRN_HIOR,0 /* Clear interrupt prefix */
73 isync
74 blr
75
76_GLOBAL(__setup_cpu_power4)
77 blr
78
79_GLOBAL(__setup_cpu_be)
80 /* Set large page sizes LP=0: 16MB, LP=1: 64KB */
81 addi r3, 0, 0
82 ori r3, r3, HID6_LB
83 sldi r3, r3, 32
84 nor r3, r3, r3
85 mfspr r4, SPRN_HID6
86 and r4, r4, r3
87 addi r3, 0, 0x02000
88 sldi r3, r3, 32
89 or r4, r4, r3
90 mtspr SPRN_HID6, r4
91 blr
92
93_GLOBAL(__setup_cpu_ppc970)
94 mfspr r0,SPRN_HID0
95 li r11,5 /* clear DOZE and SLEEP */
96 rldimi r0,r11,52,8 /* set NAP and DPM */
97 mtspr SPRN_HID0,r0
98 mfspr r0,SPRN_HID0
99 mfspr r0,SPRN_HID0
100 mfspr r0,SPRN_HID0
101 mfspr r0,SPRN_HID0
102 mfspr r0,SPRN_HID0
103 mfspr r0,SPRN_HID0
104 sync
105 isync
106 blr
107
108/* Definitions for the table use to save CPU states */
109#define CS_HID0 0
110#define CS_HID1 8
111#define CS_HID4 16
112#define CS_HID5 24
113#define CS_SIZE 32
114
115 .data
116 .balign L1_CACHE_BYTES,0
117cpu_state_storage:
118 .space CS_SIZE
119 .balign L1_CACHE_BYTES,0
120 .text
121
122/* Called in normal context to backup CPU 0 state. This
123 * does not include cache settings. This function is also
124 * called for machine sleep. This does not include the MMU
125 * setup, BATs, etc... but rather the "special" registers
126 * like HID0, HID1, HID4, etc...
127 */
128_GLOBAL(__save_cpu_setup)
129 /* Some CR fields are volatile, we back it up all */
130 mfcr r7
131
132 /* Get storage ptr */
133 LOADADDR(r5,cpu_state_storage)
134
135 /* We only deal with 970 for now */
136 mfspr r0,SPRN_PVR
137 srwi r0,r0,16
138 cmpwi r0,0x39
139 beq 1f
140 cmpwi r0,0x3c
141 beq 1f
142 cmpwi r0,0x44
143 bne 2f
144
1451: /* Save HID0,1,4 and 5 */
146 mfspr r3,SPRN_HID0
147 std r3,CS_HID0(r5)
148 mfspr r3,SPRN_HID1
149 std r3,CS_HID1(r5)
150 mfspr r3,SPRN_HID4
151 std r3,CS_HID4(r5)
152 mfspr r3,SPRN_HID5
153 std r3,CS_HID5(r5)
154
1552:
156 mtcr r7
157 blr
158
159/* Called with no MMU context (typically MSR:IR/DR off) to
160 * restore CPU state as backed up by the previous
161 * function. This does not include cache setting
162 */
163_GLOBAL(__restore_cpu_setup)
164 /* Get storage ptr (FIXME when using anton reloc as we
165 * are running with translation disabled here
166 */
167 LOADADDR(r5,cpu_state_storage)
168
169 /* We only deal with 970 for now */
170 mfspr r0,SPRN_PVR
171 srwi r0,r0,16
172 cmpwi r0,0x39
173 beq 1f
174 cmpwi r0,0x3c
175 beq 1f
176 cmpwi r0,0x44
177 bnelr
178
1791: /* Before accessing memory, we make sure rm_ci is clear */
180 li r0,0
181 mfspr r3,SPRN_HID4
182 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
183 sync
184 mtspr SPRN_HID4,r3
185 isync
186 sync
187
188 /* Clear interrupt prefix */
189 li r0,0
190 sync
191 mtspr SPRN_HIOR,0
192 isync
193
194 /* Restore HID0 */
195 ld r3,CS_HID0(r5)
196 sync
197 isync
198 mtspr SPRN_HID0,r3
199 mfspr r3,SPRN_HID0
200 mfspr r3,SPRN_HID0
201 mfspr r3,SPRN_HID0
202 mfspr r3,SPRN_HID0
203 mfspr r3,SPRN_HID0
204 mfspr r3,SPRN_HID0
205 sync
206 isync
207
208 /* Restore HID1 */
209 ld r3,CS_HID1(r5)
210 sync
211 isync
212 mtspr SPRN_HID1,r3
213 mtspr SPRN_HID1,r3
214 sync
215 isync
216
217 /* Restore HID4 */
218 ld r3,CS_HID4(r5)
219 sync
220 isync
221 mtspr SPRN_HID4,r3
222 sync
223 isync
224
225 /* Restore HID5 */
226 ld r3,CS_HID5(r5)
227 sync
228 isync
229 mtspr SPRN_HID5,r3
230 sync
231 isync
232 blr
233
diff --git a/arch/powerpc/kernel/firmware.c b/arch/powerpc/kernel/firmware.c
new file mode 100644
index 000000000000..65eae752a527
--- /dev/null
+++ b/arch/powerpc/kernel/firmware.c
@@ -0,0 +1,45 @@
1/*
2 * Extracted from cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * Modifications for ppc64:
7 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
8 * Copyright (C) 2005 Stephen Rothwell, IBM Corporation
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/config.h>
17
18#include <asm/firmware.h>
19
20unsigned long ppc64_firmware_features;
21
22#ifdef CONFIG_PPC_PSERIES
23firmware_feature_t firmware_features_table[FIRMWARE_MAX_FEATURES] = {
24 {FW_FEATURE_PFT, "hcall-pft"},
25 {FW_FEATURE_TCE, "hcall-tce"},
26 {FW_FEATURE_SPRG0, "hcall-sprg0"},
27 {FW_FEATURE_DABR, "hcall-dabr"},
28 {FW_FEATURE_COPY, "hcall-copy"},
29 {FW_FEATURE_ASR, "hcall-asr"},
30 {FW_FEATURE_DEBUG, "hcall-debug"},
31 {FW_FEATURE_PERF, "hcall-perf"},
32 {FW_FEATURE_DUMP, "hcall-dump"},
33 {FW_FEATURE_INTERRUPT, "hcall-interrupt"},
34 {FW_FEATURE_MIGRATE, "hcall-migrate"},
35 {FW_FEATURE_PERFMON, "hcall-perfmon"},
36 {FW_FEATURE_CRQ, "hcall-crq"},
37 {FW_FEATURE_VIO, "hcall-vio"},
38 {FW_FEATURE_RDMA, "hcall-rdma"},
39 {FW_FEATURE_LLAN, "hcall-lLAN"},
40 {FW_FEATURE_BULK, "hcall-bulk"},
41 {FW_FEATURE_XDABR, "hcall-xdabr"},
42 {FW_FEATURE_MULTITCE, "hcall-multi-tce"},
43 {FW_FEATURE_SPLPAR, "hcall-splpar"},
44};
45#endif
diff --git a/arch/powerpc/kernel/ioctl32.c b/arch/powerpc/kernel/ioctl32.c
new file mode 100644
index 000000000000..3fa6a93adbd0
--- /dev/null
+++ b/arch/powerpc/kernel/ioctl32.c
@@ -0,0 +1,49 @@
1/*
2 * ioctl32.c: Conversion between 32bit and 64bit native ioctls.
3 *
4 * Based on sparc64 ioctl32.c by:
5 *
6 * Copyright (C) 1997-2000 Jakub Jelinek (jakub@redhat.com)
7 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
8 *
9 * ppc64 changes:
10 *
11 * Copyright (C) 2000 Ken Aaker (kdaaker@rchland.vnet.ibm.com)
12 * Copyright (C) 2001 Anton Blanchard (antonb@au.ibm.com)
13 *
14 * These routines maintain argument size conversion between 32bit and 64bit
15 * ioctls.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 */
22
23#define INCLUDES
24#include "compat_ioctl.c"
25#include <linux/syscalls.h>
26
27#define CODE
28#include "compat_ioctl.c"
29
30#define HANDLE_IOCTL(cmd,handler) { cmd, (ioctl_trans_handler_t)handler, NULL },
31#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL(cmd,sys_ioctl)
32
33#define IOCTL_TABLE_START \
34 struct ioctl_trans ioctl_start[] = {
35#define IOCTL_TABLE_END \
36 };
37
38IOCTL_TABLE_START
39#include <linux/compat_ioctl.h>
40#define DECLARES
41#include "compat_ioctl.c"
42
43/* Little p (/dev/rtc, /dev/envctrl, etc.) */
44COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */
45COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */
46
47IOCTL_TABLE_END
48
49int ioctl_table_size = ARRAY_SIZE(ioctl_start);
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
new file mode 100644
index 000000000000..179948eb0580
--- /dev/null
+++ b/arch/powerpc/kernel/paca.c
@@ -0,0 +1,143 @@
1/*
2 * c 2001 PPC 64 Team, IBM Corp
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include <linux/config.h>
11#include <linux/types.h>
12#include <linux/threads.h>
13#include <linux/module.h>
14
15#include <asm/processor.h>
16#include <asm/ptrace.h>
17#include <asm/page.h>
18
19#include <asm/lppaca.h>
20#include <asm/iseries/it_lp_queue.h>
21#include <asm/paca.h>
22
23static union {
24 struct systemcfg data;
25 u8 page[PAGE_SIZE];
26} systemcfg_store __attribute__((__section__(".data.page.aligned")));
27struct systemcfg *systemcfg = &systemcfg_store.data;
28EXPORT_SYMBOL(systemcfg);
29
30
31/* This symbol is provided by the linker - let it fill in the paca
32 * field correctly */
33extern unsigned long __toc_start;
34
35/* The Paca is an array with one entry per processor. Each contains an
36 * lppaca, which contains the information shared between the
37 * hypervisor and Linux. Each also contains an ItLpRegSave area which
38 * is used by the hypervisor to save registers.
39 * On systems with hardware multi-threading, there are two threads
40 * per processor. The Paca array must contain an entry for each thread.
41 * The VPD Areas will give a max logical processors = 2 * max physical
42 * processors. The processor VPD array needs one entry per physical
43 * processor (not thread).
44 */
45#define PACA_INIT_COMMON(number, start, asrr, asrv) \
46 .lock_token = 0x8000, \
47 .paca_index = (number), /* Paca Index */ \
48 .default_decr = 0x00ff0000, /* Initial Decr */ \
49 .kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \
50 .stab_real = (asrr), /* Real pointer to segment table */ \
51 .stab_addr = (asrv), /* Virt pointer to segment table */ \
52 .cpu_start = (start), /* Processor start */ \
53 .hw_cpu_id = 0xffff, \
54 .lppaca = { \
55 .desc = 0xd397d781, /* "LpPa" */ \
56 .size = sizeof(struct lppaca), \
57 .dyn_proc_status = 2, \
58 .decr_val = 0x00ff0000, \
59 .fpregs_in_use = 1, \
60 .end_of_quantum = 0xfffffffffffffffful, \
61 .slb_count = 64, \
62 .vmxregs_in_use = 0, \
63 }, \
64
65#ifdef CONFIG_PPC_ISERIES
66#define PACA_INIT_ISERIES(number) \
67 .lppaca_ptr = &paca[number].lppaca, \
68 .reg_save_ptr = &paca[number].reg_save, \
69 .reg_save = { \
70 .xDesc = 0xd397d9e2, /* "LpRS" */ \
71 .xSize = sizeof(struct ItLpRegSave) \
72 }
73
74#define PACA_INIT(number) \
75{ \
76 PACA_INIT_COMMON(number, 0, 0, 0) \
77 PACA_INIT_ISERIES(number) \
78}
79
80#define BOOTCPU_PACA_INIT(number) \
81{ \
82 PACA_INIT_COMMON(number, 1, 0, (u64)&initial_stab) \
83 PACA_INIT_ISERIES(number) \
84}
85
86#else
87#define PACA_INIT(number) \
88{ \
89 PACA_INIT_COMMON(number, 0, 0, 0) \
90}
91
92#define BOOTCPU_PACA_INIT(number) \
93{ \
94 PACA_INIT_COMMON(number, 1, STAB0_PHYS_ADDR, (u64)&initial_stab) \
95}
96#endif
97
98struct paca_struct paca[] = {
99 BOOTCPU_PACA_INIT(0),
100#if NR_CPUS > 1
101 PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
102#if NR_CPUS > 4
103 PACA_INIT( 4), PACA_INIT( 5), PACA_INIT( 6), PACA_INIT( 7),
104#if NR_CPUS > 8
105 PACA_INIT( 8), PACA_INIT( 9), PACA_INIT( 10), PACA_INIT( 11),
106 PACA_INIT( 12), PACA_INIT( 13), PACA_INIT( 14), PACA_INIT( 15),
107 PACA_INIT( 16), PACA_INIT( 17), PACA_INIT( 18), PACA_INIT( 19),
108 PACA_INIT( 20), PACA_INIT( 21), PACA_INIT( 22), PACA_INIT( 23),
109 PACA_INIT( 24), PACA_INIT( 25), PACA_INIT( 26), PACA_INIT( 27),
110 PACA_INIT( 28), PACA_INIT( 29), PACA_INIT( 30), PACA_INIT( 31),
111#if NR_CPUS > 32
112 PACA_INIT( 32), PACA_INIT( 33), PACA_INIT( 34), PACA_INIT( 35),
113 PACA_INIT( 36), PACA_INIT( 37), PACA_INIT( 38), PACA_INIT( 39),
114 PACA_INIT( 40), PACA_INIT( 41), PACA_INIT( 42), PACA_INIT( 43),
115 PACA_INIT( 44), PACA_INIT( 45), PACA_INIT( 46), PACA_INIT( 47),
116 PACA_INIT( 48), PACA_INIT( 49), PACA_INIT( 50), PACA_INIT( 51),
117 PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
118 PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
119 PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
120#if NR_CPUS > 64
121 PACA_INIT( 64), PACA_INIT( 65), PACA_INIT( 66), PACA_INIT( 67),
122 PACA_INIT( 68), PACA_INIT( 69), PACA_INIT( 70), PACA_INIT( 71),
123 PACA_INIT( 72), PACA_INIT( 73), PACA_INIT( 74), PACA_INIT( 75),
124 PACA_INIT( 76), PACA_INIT( 77), PACA_INIT( 78), PACA_INIT( 79),
125 PACA_INIT( 80), PACA_INIT( 81), PACA_INIT( 82), PACA_INIT( 83),
126 PACA_INIT( 84), PACA_INIT( 85), PACA_INIT( 86), PACA_INIT( 87),
127 PACA_INIT( 88), PACA_INIT( 89), PACA_INIT( 90), PACA_INIT( 91),
128 PACA_INIT( 92), PACA_INIT( 93), PACA_INIT( 94), PACA_INIT( 95),
129 PACA_INIT( 96), PACA_INIT( 97), PACA_INIT( 98), PACA_INIT( 99),
130 PACA_INIT(100), PACA_INIT(101), PACA_INIT(102), PACA_INIT(103),
131 PACA_INIT(104), PACA_INIT(105), PACA_INIT(106), PACA_INIT(107),
132 PACA_INIT(108), PACA_INIT(109), PACA_INIT(110), PACA_INIT(111),
133 PACA_INIT(112), PACA_INIT(113), PACA_INIT(114), PACA_INIT(115),
134 PACA_INIT(116), PACA_INIT(117), PACA_INIT(118), PACA_INIT(119),
135 PACA_INIT(120), PACA_INIT(121), PACA_INIT(122), PACA_INIT(123),
136 PACA_INIT(124), PACA_INIT(125), PACA_INIT(126), PACA_INIT(127),
137#endif
138#endif
139#endif
140#endif
141#endif
142};
143EXPORT_SYMBOL(paca);