diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2009-08-18 15:08:30 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-08-28 00:24:13 -0400 |
commit | f45c4486f70d0a6502e7499a8664cdc0bba84cd2 (patch) | |
tree | e016204f305fc00b5acbb8570fbd0949fcca7905 /arch/powerpc/kernel | |
parent | df5d6ecf8157245ef733db87597adb2c6e2510da (diff) |
powerpc/book3e-64: Move the default cpu table entry
Move the default cpu entry table for CONFIG_PPC_BOOK3E_64 to the
very end since we will probably want to support both 32-bit and
64-bit kernels for some processors that are higher up in the list.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 49 |
1 files changed, 27 insertions, 22 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 9f38ecb17859..0b9c9135922e 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -89,8 +89,12 @@ extern void __restore_cpu_power7(void); | |||
89 | #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ | 89 | #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ |
90 | PPC_FEATURE_TRUE_LE | \ | 90 | PPC_FEATURE_TRUE_LE | \ |
91 | PPC_FEATURE_HAS_ALTIVEC_COMP) | 91 | PPC_FEATURE_HAS_ALTIVEC_COMP) |
92 | #ifdef CONFIG_PPC_BOOK3E_64 | ||
93 | #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) | ||
94 | #else | ||
92 | #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ | 95 | #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ |
93 | PPC_FEATURE_BOOKE) | 96 | PPC_FEATURE_BOOKE) |
97 | #endif | ||
94 | 98 | ||
95 | static struct cpu_spec __initdata cpu_specs[] = { | 99 | static struct cpu_spec __initdata cpu_specs[] = { |
96 | #ifdef CONFIG_PPC_BOOK3S_64 | 100 | #ifdef CONFIG_PPC_BOOK3S_64 |
@@ -509,28 +513,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
509 | .platform = "power4", | 513 | .platform = "power4", |
510 | } | 514 | } |
511 | #endif /* CONFIG_PPC_BOOK3S_64 */ | 515 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
512 | #ifdef CONFIG_PPC_BOOK3E_64 | ||
513 | { /* This is a default entry to get going, to be replaced by | ||
514 | * a real one at some stage | ||
515 | */ | ||
516 | #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ | ||
517 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ | ||
518 | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) | ||
519 | .pvr_mask = 0x00000000, | ||
520 | .pvr_value = 0x00000000, | ||
521 | .cpu_name = "Book3E", | ||
522 | .cpu_features = CPU_FTRS_BASE_BOOK3E, | ||
523 | .cpu_user_features = COMMON_USER_PPC64, | ||
524 | .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | | ||
525 | MMU_FTR_USE_TLBIVAX_BCAST | | ||
526 | MMU_FTR_LOCK_BCAST_INVAL, | ||
527 | .icache_bsize = 64, | ||
528 | .dcache_bsize = 64, | ||
529 | .num_pmcs = 0, | ||
530 | .machine_check = machine_check_generic, | ||
531 | .platform = "power6", | ||
532 | }, | ||
533 | #endif | ||
534 | 516 | ||
535 | #ifdef CONFIG_PPC32 | 517 | #ifdef CONFIG_PPC32 |
536 | #if CLASSIC_PPC | 518 | #if CLASSIC_PPC |
@@ -1846,6 +1828,29 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1846 | } | 1828 | } |
1847 | #endif /* CONFIG_E500 */ | 1829 | #endif /* CONFIG_E500 */ |
1848 | #endif /* CONFIG_PPC32 */ | 1830 | #endif /* CONFIG_PPC32 */ |
1831 | |||
1832 | #ifdef CONFIG_PPC_BOOK3E_64 | ||
1833 | { /* This is a default entry to get going, to be replaced by | ||
1834 | * a real one at some stage | ||
1835 | */ | ||
1836 | #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \ | ||
1837 | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \ | ||
1838 | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) | ||
1839 | .pvr_mask = 0x00000000, | ||
1840 | .pvr_value = 0x00000000, | ||
1841 | .cpu_name = "Book3E", | ||
1842 | .cpu_features = CPU_FTRS_BASE_BOOK3E, | ||
1843 | .cpu_user_features = COMMON_USER_PPC64, | ||
1844 | .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | | ||
1845 | MMU_FTR_USE_TLBIVAX_BCAST | | ||
1846 | MMU_FTR_LOCK_BCAST_INVAL, | ||
1847 | .icache_bsize = 64, | ||
1848 | .dcache_bsize = 64, | ||
1849 | .num_pmcs = 0, | ||
1850 | .machine_check = machine_check_generic, | ||
1851 | .platform = "power6", | ||
1852 | }, | ||
1853 | #endif | ||
1849 | }; | 1854 | }; |
1850 | 1855 | ||
1851 | static struct cpu_spec the_cpu_spec; | 1856 | static struct cpu_spec the_cpu_spec; |