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authorKumar Gala <galak@kernel.crashing.org>2009-02-10 23:26:06 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-03-09 10:25:38 -0400
commitc3071951d0acd33b5c3f820fb5eaa3a9c2a8f212 (patch)
treed52a9b1142c7d0f753f497f611f05cccbc12950f /arch/powerpc/kernel
parentc026c98739c7e435440e76cbcd96e0f8ebeeada0 (diff)
powerpc/fsl-booke: Add support for tlbilx instructions
The e500mc core supports the new tlbilx instructions that do core local invalidates and also provide us the ability to take down all TLB entries matching a given PID. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/cputable.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index f59ca710f448..b2938e0ef2f3 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1754,7 +1754,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
1754 .cpu_name = "e500mc", 1754 .cpu_name = "e500mc",
1755 .cpu_features = CPU_FTRS_E500MC, 1755 .cpu_features = CPU_FTRS_E500MC,
1756 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1756 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1757 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1757 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1758 MMU_FTR_USE_TLBILX,
1758 .icache_bsize = 64, 1759 .icache_bsize = 64,
1759 .dcache_bsize = 64, 1760 .dcache_bsize = 64,
1760 .num_pmcs = 4, 1761 .num_pmcs = 4,