diff options
author | Anton Blanchard <anton@samba.org> | 2006-06-10 06:18:39 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-06-15 05:31:25 -0400 |
commit | 3a2c48cfc97f9046abbd810f1efb1aa824bcfaf1 (patch) | |
tree | afcd54f2ad36353abcf2282fdf15a05e77fcba4a /arch/powerpc/kernel/vector.S | |
parent | 30d8caf7c625203b295a78f143820cdc3124830b (diff) |
[POWERPC] 64bit FPSCR support
Forthcoming machines will extend the FPSCR to 64 bits. We already
had a 64-bit save area for the FPSCR, but we need to use a new form
of the mtfsf instruction. Fortunately this new form is decoded as
an ordinary mtfsf by existing 64-bit processors.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/vector.S')
-rw-r--r-- | arch/powerpc/kernel/vector.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S index 66b3d03c5fa5..9416b4ab92ec 100644 --- a/arch/powerpc/kernel/vector.S +++ b/arch/powerpc/kernel/vector.S | |||
@@ -53,12 +53,12 @@ fpenable: | |||
53 | stfd fr31,8(r1) | 53 | stfd fr31,8(r1) |
54 | LDCONST(fr1, fpzero) | 54 | LDCONST(fr1, fpzero) |
55 | mffs fr31 | 55 | mffs fr31 |
56 | mtfsf 0xff,fr1 | 56 | MTFSF_L(fr1) |
57 | blr | 57 | blr |
58 | 58 | ||
59 | fpdisable: | 59 | fpdisable: |
60 | mtlr r12 | 60 | mtlr r12 |
61 | mtfsf 0xff,fr31 | 61 | MTFSF_L(fr31) |
62 | lfd fr31,8(r1) | 62 | lfd fr31,8(r1) |
63 | lfd fr1,16(r1) | 63 | lfd fr1,16(r1) |
64 | lfd fr0,24(r1) | 64 | lfd fr0,24(r1) |