diff options
author | Paul Mackerras <paulus@samba.org> | 2013-09-10 06:20:42 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-10-11 02:26:49 -0400 |
commit | de79f7b9f6f92ec1bd6f61fa1f20de60728a5b5e (patch) | |
tree | 452b24060a36bf7c57a3a484c6ff981539259ea2 /arch/powerpc/kernel/vecemu.c | |
parent | 8e0a1611cb891e72a9affc4a8ee4795c634896a6 (diff) |
powerpc: Put FP/VSX and VR state into structures
This creates new 'thread_fp_state' and 'thread_vr_state' structures
to store FP/VSX state (including FPSCR) and Altivec/VSX state
(including VSCR), and uses them in the thread_struct. In the
thread_fp_state, the FPRs and VSRs are represented as u64 rather
than double, since we rarely perform floating-point computations
on the values, and this will enable the structures to be used
in KVM code as well. Similarly FPSCR is now a u64 rather than
a structure of two 32-bit values.
This takes the offsets out of the macros such as SAVE_32FPRS,
REST_32FPRS, etc. This enables the same macros to be used for normal
and transactional state, enabling us to delete the transactional
versions of the macros. This also removes the unused do_load_up_fpu
and do_load_up_altivec, which were in fact buggy since they didn't
create large enough stack frames to account for the fact that
load_up_fpu and load_up_altivec are not designed to be called from C
and assume that their caller's stack frame is an interrupt frame.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/vecemu.c')
-rw-r--r-- | arch/powerpc/kernel/vecemu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/vecemu.c b/arch/powerpc/kernel/vecemu.c index 604d0947cb20..c4bfadb2606b 100644 --- a/arch/powerpc/kernel/vecemu.c +++ b/arch/powerpc/kernel/vecemu.c | |||
@@ -271,7 +271,7 @@ int emulate_altivec(struct pt_regs *regs) | |||
271 | vb = (instr >> 11) & 0x1f; | 271 | vb = (instr >> 11) & 0x1f; |
272 | vc = (instr >> 6) & 0x1f; | 272 | vc = (instr >> 6) & 0x1f; |
273 | 273 | ||
274 | vrs = current->thread.vr; | 274 | vrs = current->thread.vr_state.vr; |
275 | switch (instr & 0x3f) { | 275 | switch (instr & 0x3f) { |
276 | case 10: | 276 | case 10: |
277 | switch (vc) { | 277 | switch (vc) { |
@@ -320,12 +320,12 @@ int emulate_altivec(struct pt_regs *regs) | |||
320 | case 14: /* vctuxs */ | 320 | case 14: /* vctuxs */ |
321 | for (i = 0; i < 4; ++i) | 321 | for (i = 0; i < 4; ++i) |
322 | vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va, | 322 | vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va, |
323 | ¤t->thread.vscr.u[3]); | 323 | ¤t->thread.vr_state.vscr.u[3]); |
324 | break; | 324 | break; |
325 | case 15: /* vctsxs */ | 325 | case 15: /* vctsxs */ |
326 | for (i = 0; i < 4; ++i) | 326 | for (i = 0; i < 4; ++i) |
327 | vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va, | 327 | vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va, |
328 | ¤t->thread.vscr.u[3]); | 328 | ¤t->thread.vr_state.vscr.u[3]); |
329 | break; | 329 | break; |
330 | default: | 330 | default: |
331 | return -EINVAL; | 331 | return -EINVAL; |