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authorMichael Neuling <mikey@neuling.org>2013-02-13 11:21:32 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-02-15 00:58:50 -0500
commit8b3c34cf0e0ab334a24aad7367cd06a5ba09a898 (patch)
treea0dbebeaee859a25117559f7a4aff9c59224d847 /arch/powerpc/kernel/traps.c
parentf4c3aff2230bfe696a0683073b77446248d7895c (diff)
powerpc: New macros for transactional memory support
This adds new macros for saving and restoring checkpointed architected state from and to the thread_struct. It also adds some debugging macros for when your brain explodes trying to debug your transactional memory enabled kernel. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/traps.c')
-rw-r--r--arch/powerpc/kernel/traps.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index a008cf5c0fce..bd5de5deaf51 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -78,6 +78,13 @@ EXPORT_SYMBOL(__debugger_break_match);
78EXPORT_SYMBOL(__debugger_fault_handler); 78EXPORT_SYMBOL(__debugger_fault_handler);
79#endif 79#endif
80 80
81/* Transactional Memory trap debug */
82#ifdef TM_DEBUG_SW
83#define TM_DEBUG(x...) printk(KERN_INFO x)
84#else
85#define TM_DEBUG(x...) do { } while(0)
86#endif
87
81/* 88/*
82 * Trap & Exception support 89 * Trap & Exception support
83 */ 90 */
@@ -350,6 +357,7 @@ static inline int check_io_access(struct pt_regs *regs)
350 exception is in the MSR. */ 357 exception is in the MSR. */
351#define get_reason(regs) ((regs)->msr) 358#define get_reason(regs) ((regs)->msr)
352#define get_mc_reason(regs) ((regs)->msr) 359#define get_mc_reason(regs) ((regs)->msr)
360#define REASON_TM 0x200000
353#define REASON_FP 0x100000 361#define REASON_FP 0x100000
354#define REASON_ILLEGAL 0x80000 362#define REASON_ILLEGAL 0x80000
355#define REASON_PRIVILEGED 0x40000 363#define REASON_PRIVILEGED 0x40000