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authorKumar Gala <galak@kernel.crashing.org>2008-06-27 09:03:13 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-07-14 08:55:42 -0400
commitddb107e98b58ee280e99317cfd6efd16112678f2 (patch)
tree4dbaf938a92ba1d9b28a3fb5cc8d1ea5653072df /arch/powerpc/kernel/time.c
parent98384c6cdd1fd593f399b6f879bae2cae70aad48 (diff)
powerpc/booke: don't reinitialize time base
For some reason long ago I decided that we should zero out the time base when we calibrate the decrementer. The problem is that this can be harmful in SMP systems where the firmware has already synchronized the time bases on the various cores. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/time.c')
-rw-r--r--arch/powerpc/kernel/time.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index c73fc33aa817..eb938808ddfb 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -742,10 +742,6 @@ void __init generic_calibrate_decr(void)
742 } 742 }
743 743
744#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 744#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
745 /* Set the time base to zero */
746 mtspr(SPRN_TBWL, 0);
747 mtspr(SPRN_TBWU, 0);
748
749 /* Clear any pending timer interrupts */ 745 /* Clear any pending timer interrupts */
750 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); 746 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
751 747