diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-12-18 14:13:32 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2008-12-20 22:21:16 -0500 |
commit | 7c03d653cd257793dc40520c94e229b5fd0578e7 (patch) | |
tree | c2beffddec486c47f8ec6df5c3b592c143380559 /arch/powerpc/kernel/swsusp_32.S | |
parent | 2ca8cf738907180e7fbda90f25f32b86feda609f (diff) |
powerpc/mm: Introduce MMU features
We're soon running out of CPU features and I need to add some new
ones for various MMU related bits, so this patch separates the MMU
features from the CPU features. I moved over the 32-bit MMU related
ones, added base features for MMU type families, but didn't move
over any 64-bit only feature yet.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/swsusp_32.S')
-rw-r--r-- | arch/powerpc/kernel/swsusp_32.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S index 77fc76607ab2..b47d8ceffb52 100644 --- a/arch/powerpc/kernel/swsusp_32.S +++ b/arch/powerpc/kernel/swsusp_32.S | |||
@@ -5,7 +5,7 @@ | |||
5 | #include <asm/thread_info.h> | 5 | #include <asm/thread_info.h> |
6 | #include <asm/ppc_asm.h> | 6 | #include <asm/ppc_asm.h> |
7 | #include <asm/asm-offsets.h> | 7 | #include <asm/asm-offsets.h> |
8 | 8 | #include <asm/mmu.h> | |
9 | 9 | ||
10 | /* | 10 | /* |
11 | * Structure for storing CPU registers on the save area. | 11 | * Structure for storing CPU registers on the save area. |
@@ -279,7 +279,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |||
279 | mtibatl 3,r4 | 279 | mtibatl 3,r4 |
280 | #endif | 280 | #endif |
281 | 281 | ||
282 | BEGIN_FTR_SECTION | 282 | BEGIN_MMU_FTR_SECTION |
283 | li r4,0 | 283 | li r4,0 |
284 | mtspr SPRN_DBAT4U,r4 | 284 | mtspr SPRN_DBAT4U,r4 |
285 | mtspr SPRN_DBAT4L,r4 | 285 | mtspr SPRN_DBAT4L,r4 |
@@ -297,7 +297,7 @@ BEGIN_FTR_SECTION | |||
297 | mtspr SPRN_IBAT6L,r4 | 297 | mtspr SPRN_IBAT6L,r4 |
298 | mtspr SPRN_IBAT7U,r4 | 298 | mtspr SPRN_IBAT7U,r4 |
299 | mtspr SPRN_IBAT7L,r4 | 299 | mtspr SPRN_IBAT7L,r4 |
300 | END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS) | 300 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS) |
301 | 301 | ||
302 | /* Flush all TLBs */ | 302 | /* Flush all TLBs */ |
303 | lis r4,0x1000 | 303 | lis r4,0x1000 |