diff options
author | Scott Wood <scottwood@freescale.com> | 2007-09-18 16:29:35 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-10-04 12:02:54 -0400 |
commit | 5dd57a1308a7e40e04fb6ecbff170df7a0b92cd8 (patch) | |
tree | 7766bea806c977c47624e43c1c21a2a11ff1782d /arch/powerpc/kernel/softemu8xx.c | |
parent | c4e05bc57dd14294683cdea7fe36ce3c01f5c6ae (diff) |
[POWERPC] 8xx: Move softemu8xx.c from arch/ppc
Previously, Soft_emulate_8xx was called with no implementation, resulting in
build failures whenever building 8xx without math emulation. The
implementation is copied from arch/ppc to resolve this issue.
However, this sort of minimal emulation is not a very good idea other than
for compatibility with existing userspaces, as it's less efficient than
soft-float and can mislead users into believing they have soft-float. Thus,
it is made a configurable option, off by default.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/softemu8xx.c')
-rw-r--r-- | arch/powerpc/kernel/softemu8xx.c | 202 |
1 files changed, 202 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c new file mode 100644 index 000000000000..67d6f6890edc --- /dev/null +++ b/arch/powerpc/kernel/softemu8xx.c | |||
@@ -0,0 +1,202 @@ | |||
1 | /* | ||
2 | * Software emulation of some PPC instructions for the 8xx core. | ||
3 | * | ||
4 | * Copyright (C) 1998 Dan Malek (dmalek@jlc.net) | ||
5 | * | ||
6 | * Software floating emuation for the MPC8xx processor. I did this mostly | ||
7 | * because it was easier than trying to get the libraries compiled for | ||
8 | * software floating point. The goal is still to get the libraries done, | ||
9 | * but I lost patience and needed some hacks to at least get init and | ||
10 | * shells running. The first problem is the setjmp/longjmp that save | ||
11 | * and restore the floating point registers. | ||
12 | * | ||
13 | * For this emulation, our working registers are found on the register | ||
14 | * save area. | ||
15 | */ | ||
16 | |||
17 | #include <linux/errno.h> | ||
18 | #include <linux/sched.h> | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/stddef.h> | ||
22 | #include <linux/unistd.h> | ||
23 | #include <linux/ptrace.h> | ||
24 | #include <linux/slab.h> | ||
25 | #include <linux/user.h> | ||
26 | #include <linux/a.out.h> | ||
27 | #include <linux/interrupt.h> | ||
28 | |||
29 | #include <asm/pgtable.h> | ||
30 | #include <asm/uaccess.h> | ||
31 | #include <asm/system.h> | ||
32 | #include <asm/io.h> | ||
33 | |||
34 | /* Eventually we may need a look-up table, but this works for now. | ||
35 | */ | ||
36 | #define LFS 48 | ||
37 | #define LFD 50 | ||
38 | #define LFDU 51 | ||
39 | #define STFD 54 | ||
40 | #define STFDU 55 | ||
41 | #define FMR 63 | ||
42 | |||
43 | void print_8xx_pte(struct mm_struct *mm, unsigned long addr) | ||
44 | { | ||
45 | pgd_t *pgd; | ||
46 | pmd_t *pmd; | ||
47 | pte_t *pte; | ||
48 | |||
49 | printk(" pte @ 0x%8lx: ", addr); | ||
50 | pgd = pgd_offset(mm, addr & PAGE_MASK); | ||
51 | if (pgd) { | ||
52 | pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK), | ||
53 | addr & PAGE_MASK); | ||
54 | if (pmd && pmd_present(*pmd)) { | ||
55 | pte = pte_offset_kernel(pmd, addr & PAGE_MASK); | ||
56 | if (pte) { | ||
57 | printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n", | ||
58 | (long)pgd, (long)pte, (long)pte_val(*pte)); | ||
59 | #define pp ((long)pte_val(*pte)) | ||
60 | printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx " | ||
61 | "CI: %lx v: %lx\n", | ||
62 | pp>>12, /* rpn */ | ||
63 | (pp>>10)&3, /* pp */ | ||
64 | (pp>>3)&1, /* small */ | ||
65 | (pp>>2)&1, /* shared */ | ||
66 | (pp>>1)&1, /* cache inhibit */ | ||
67 | pp&1 /* valid */ | ||
68 | ); | ||
69 | #undef pp | ||
70 | } | ||
71 | else { | ||
72 | printk("no pte\n"); | ||
73 | } | ||
74 | } | ||
75 | else { | ||
76 | printk("no pmd\n"); | ||
77 | } | ||
78 | } | ||
79 | else { | ||
80 | printk("no pgd\n"); | ||
81 | } | ||
82 | } | ||
83 | |||
84 | int get_8xx_pte(struct mm_struct *mm, unsigned long addr) | ||
85 | { | ||
86 | pgd_t *pgd; | ||
87 | pmd_t *pmd; | ||
88 | pte_t *pte; | ||
89 | int retval = 0; | ||
90 | |||
91 | pgd = pgd_offset(mm, addr & PAGE_MASK); | ||
92 | if (pgd) { | ||
93 | pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK), | ||
94 | addr & PAGE_MASK); | ||
95 | if (pmd && pmd_present(*pmd)) { | ||
96 | pte = pte_offset_kernel(pmd, addr & PAGE_MASK); | ||
97 | if (pte) { | ||
98 | retval = (int)pte_val(*pte); | ||
99 | } | ||
100 | } | ||
101 | } | ||
102 | return retval; | ||
103 | } | ||
104 | |||
105 | /* | ||
106 | * We return 0 on success, 1 on unimplemented instruction, and EFAULT | ||
107 | * if a load/store faulted. | ||
108 | */ | ||
109 | int Soft_emulate_8xx(struct pt_regs *regs) | ||
110 | { | ||
111 | u32 inst, instword; | ||
112 | u32 flreg, idxreg, disp; | ||
113 | int retval; | ||
114 | s16 sdisp; | ||
115 | u32 *ea, *ip; | ||
116 | |||
117 | retval = 0; | ||
118 | |||
119 | instword = *((u32 *)regs->nip); | ||
120 | inst = instword >> 26; | ||
121 | |||
122 | flreg = (instword >> 21) & 0x1f; | ||
123 | idxreg = (instword >> 16) & 0x1f; | ||
124 | disp = instword & 0xffff; | ||
125 | |||
126 | ea = (u32 *)(regs->gpr[idxreg] + disp); | ||
127 | ip = (u32 *)¤t->thread.fpr[flreg]; | ||
128 | |||
129 | switch ( inst ) | ||
130 | { | ||
131 | case LFD: | ||
132 | /* this is a 16 bit quantity that is sign extended | ||
133 | * so use a signed short here -- Cort | ||
134 | */ | ||
135 | sdisp = (instword & 0xffff); | ||
136 | ea = (u32 *)(regs->gpr[idxreg] + sdisp); | ||
137 | if (copy_from_user(ip, ea, sizeof(double))) | ||
138 | retval = -EFAULT; | ||
139 | break; | ||
140 | |||
141 | case LFDU: | ||
142 | if (copy_from_user(ip, ea, sizeof(double))) | ||
143 | retval = -EFAULT; | ||
144 | else | ||
145 | regs->gpr[idxreg] = (u32)ea; | ||
146 | break; | ||
147 | case LFS: | ||
148 | sdisp = (instword & 0xffff); | ||
149 | ea = (u32 *)(regs->gpr[idxreg] + sdisp); | ||
150 | if (copy_from_user(ip, ea, sizeof(float))) | ||
151 | retval = -EFAULT; | ||
152 | break; | ||
153 | case STFD: | ||
154 | /* this is a 16 bit quantity that is sign extended | ||
155 | * so use a signed short here -- Cort | ||
156 | */ | ||
157 | sdisp = (instword & 0xffff); | ||
158 | ea = (u32 *)(regs->gpr[idxreg] + sdisp); | ||
159 | if (copy_to_user(ea, ip, sizeof(double))) | ||
160 | retval = -EFAULT; | ||
161 | break; | ||
162 | |||
163 | case STFDU: | ||
164 | if (copy_to_user(ea, ip, sizeof(double))) | ||
165 | retval = -EFAULT; | ||
166 | else | ||
167 | regs->gpr[idxreg] = (u32)ea; | ||
168 | break; | ||
169 | case FMR: | ||
170 | /* assume this is a fp move -- Cort */ | ||
171 | memcpy(ip, ¤t->thread.fpr[(instword>>11)&0x1f], | ||
172 | sizeof(double)); | ||
173 | break; | ||
174 | default: | ||
175 | retval = 1; | ||
176 | printk("Bad emulation %s/%d\n" | ||
177 | " NIP: %08lx instruction: %08x opcode: %x " | ||
178 | "A: %x B: %x C: %x code: %x rc: %x\n", | ||
179 | current->comm,current->pid, | ||
180 | regs->nip, | ||
181 | instword,inst, | ||
182 | (instword>>16)&0x1f, | ||
183 | (instword>>11)&0x1f, | ||
184 | (instword>>6)&0x1f, | ||
185 | (instword>>1)&0x3ff, | ||
186 | instword&1); | ||
187 | { | ||
188 | int pa; | ||
189 | print_8xx_pte(current->mm,regs->nip); | ||
190 | pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK; | ||
191 | pa |= (regs->nip & ~PAGE_MASK); | ||
192 | pa = (unsigned long)__va(pa); | ||
193 | printk("Kernel VA for NIP %x ", pa); | ||
194 | print_8xx_pte(current->mm,pa); | ||
195 | } | ||
196 | } | ||
197 | |||
198 | if (retval == 0) | ||
199 | regs->nip += 4; | ||
200 | |||
201 | return retval; | ||
202 | } | ||