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authorAndy Fleming <afleming@freescale.com>2011-12-08 02:20:27 -0500
committerScott Wood <scottwood@freescale.com>2014-07-29 20:26:20 -0400
commite16c8765533a155ebd3d7c36fc80440a03bbf46a (patch)
tree8e4c3ab9fd85d3a852889c13012017b5cf8770b7 /arch/powerpc/kernel/setup-common.c
parent7251a24e4d3acf2d7826e1c42fe84258c312a742 (diff)
powerpc/e6500: Add support for hardware threads
The general idea is that each core will release all of its threads into the secondary thread startup code, which will eventually wait in the secondary core holding area, for the appropriate bit in the PACA to be set. The kick_cpu function pointer will set that bit in the PACA, and thus "release" the core/thread to boot. We also need to do a few things that U-Boot normally does for CPUs (like enable branch prediction). Signed-off-by: Andy Fleming <afleming@freescale.com> [scottwood@freescale.com: various changes, including only enabling threads if Linux wants to kick them] Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/kernel/setup-common.c')
-rw-r--r--arch/powerpc/kernel/setup-common.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index e239df3768ac..1bb4dcde0dcc 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -456,18 +456,20 @@ void __init smp_setup_cpu_maps(void)
456 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", 456 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
457 &len); 457 &len);
458 if (intserv) { 458 if (intserv) {
459 nthreads = len / sizeof(int);
460 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", 459 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
461 nthreads); 460 nthreads);
462 } else { 461 } else {
463 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); 462 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
464 intserv = of_get_property(dn, "reg", NULL); 463 intserv = of_get_property(dn, "reg", &len);
465 if (!intserv) { 464 if (!intserv) {
466 cpu_be = cpu_to_be32(cpu); 465 cpu_be = cpu_to_be32(cpu);
467 intserv = &cpu_be; /* assume logical == phys */ 466 intserv = &cpu_be; /* assume logical == phys */
467 len = 4;
468 } 468 }
469 } 469 }
470 470
471 nthreads = len / sizeof(int);
472
471 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 473 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
472 DBG(" thread %d -> cpu %d (hard id %d)\n", 474 DBG(" thread %d -> cpu %d (hard id %d)\n",
473 j, cpu, be32_to_cpu(intserv[j])); 475 j, cpu, be32_to_cpu(intserv[j]));