powerpc: Introduce VSX thread_struct and CONFIG_VSX

The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:

                   VSR doubleword 0               VSR doubleword 1
          ----------------------------------------------------------------
  VSR[0]  |             FPR[0]            |                              |
          ----------------------------------------------------------------
  VSR[1]  |             FPR[1]            |                              |
          ----------------------------------------------------------------
          |              ...              |                              |
          |              ...              |                              |
          ----------------------------------------------------------------
  VSR[30] |             FPR[30]           |                              |
          ----------------------------------------------------------------
  VSR[31] |             FPR[31]           |                              |
          ----------------------------------------------------------------
  VSR[32] |                             VR[0]                            |
          ----------------------------------------------------------------
  VSR[33] |                             VR[1]                            |
          ----------------------------------------------------------------
          |                              ...                             |
          |                              ...                             |
          ----------------------------------------------------------------
  VSR[62] |                             VR[30]                           |
          ----------------------------------------------------------------
  VSR[63] |                             VR[31]                           |
          ----------------------------------------------------------------

VSX has 64 128bit registers.  The first 32 regs overlap with the FP
registers and hence extend them with and additional 64 bits.  The
second 32 regs overlap with the VMX registers.

This commit introduces the thread_struct changes required to reflect
this register layout.  Ptrace and signals code is updated so that the
floating point registers are correctly accessed from the thread_struct
when CONFIG_VSX is enabled.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 28 insertions, 1 deletions

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 59ff08704e94..70fbde84b83f 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -215,29 +215,56 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
                    unsigned int pos, unsigned int count,
                    void *kbuf, void __user *ubuf)
 {
+#ifdef CONFIG_VSX
+        double buf[33];
+        int i;
+#endif
         flush_fp_to_thread(target);
 
+#ifdef CONFIG_VSX
+        /* copy to local buffer then write that out */
+        for (i = 0; i < 32 ; i++)
+                buf[i] = target->thread.TS_FPR(i);
+        memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
+        return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
+
+#else
         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
                      offsetof(struct thread_struct, TS_FPR(32)));
 
         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
                                    &target->thread.fpr, 0, -1);
+#endif
 }
 
 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
                    unsigned int pos, unsigned int count,
                    const void *kbuf, const void __user *ubuf)
 {
+#ifdef CONFIG_VSX
+        double buf[33];
+        int i;
+#endif
         flush_fp_to_thread(target);
 
+#ifdef CONFIG_VSX
+        /* copy to local buffer then write that out */
+        i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
+        if (i)
+                return i;
+        for (i = 0; i < 32 ; i++)
+                target->thread.TS_FPR(i) = buf[i];
+        memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
+        return 0;
+#else
         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
                      offsetof(struct thread_struct, TS_FPR(32)));
 
         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
                                   &target->thread.fpr, 0, -1);
+#endif
 }
 
-
 #ifdef CONFIG_ALTIVEC
 /*
  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.