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authorDave Kleikamp <shaggy@linux.vnet.ibm.com>2010-02-08 06:50:57 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-02-16 22:03:16 -0500
commit172ae2e7f8ff9053905a36672453a6d2ff95b182 (patch)
tree2469b6923a4d7756930ac9c83e8b8fc9bfcdcbe0 /arch/powerpc/kernel/process.c
parent789c299ca280f96368c0296b739e89c0bb232f8a (diff)
powerpc/booke: Introduce new CONFIG options for advanced debug registers
powerpc/booke: Introduce new CONFIG options for advanced debug registers From: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Introduce new config options to simplify the ifdefs pertaining to the advanced debug registers for booke and 40x processors: CONFIG_PPC_ADV_DEBUG_REGS - boolean: true for dac-based processors CONFIG_PPC_ADV_DEBUG_IACS - number of IAC registers CONFIG_PPC_ADV_DEBUG_DACS - number of DAC registers CONFIG_PPC_ADV_DEBUG_DVCS - number of DVC registers CONFIG_PPC_ADV_DEBUG_DAC_RANGE - DAC ranges supported Beginning conservatively, since I only have the facilities to test 440 hardware. I believe all 40x and booke platforms support at least 2 IAC and 2 DAC registers. For 440, 4 IAC and 2 DVC registers are enabled, as well as the DAC ranges. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Acked-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/process.c')
-rw-r--r--arch/powerpc/kernel/process.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 7b816daf3eba..9be77e3936fb 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -258,7 +258,7 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
258 return; 258 return;
259 259
260 /* Clear the DAC and struct entries. One shot trigger */ 260 /* Clear the DAC and struct entries. One shot trigger */
261#if defined(CONFIG_BOOKE) 261#ifdef CONFIG_PPC_ADV_DEBUG_REGS
262 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W 262 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W
263 | DBCR0_IDM)); 263 | DBCR0_IDM));
264#endif 264#endif
@@ -284,7 +284,7 @@ int set_dabr(unsigned long dabr)
284 return ppc_md.set_dabr(dabr); 284 return ppc_md.set_dabr(dabr);
285 285
286 /* XXX should we have a CPU_FTR_HAS_DABR ? */ 286 /* XXX should we have a CPU_FTR_HAS_DABR ? */
287#if defined(CONFIG_BOOKE) 287#ifdef CONFIG_PPC_ADV_DEBUG_REGS
288 mtspr(SPRN_DAC1, dabr); 288 mtspr(SPRN_DAC1, dabr);
289#elif defined(CONFIG_PPC_BOOK3S) 289#elif defined(CONFIG_PPC_BOOK3S)
290 mtspr(SPRN_DABR, dabr); 290 mtspr(SPRN_DABR, dabr);
@@ -371,7 +371,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
371 371
372#endif /* CONFIG_SMP */ 372#endif /* CONFIG_SMP */
373 373
374#if defined(CONFIG_BOOKE) 374#ifdef CONFIG_PPC_ADV_DEBUG_REGS
375 /* If new thread DAC (HW breakpoint) is the same then leave it */ 375 /* If new thread DAC (HW breakpoint) is the same then leave it */
376 if (new->thread.dabr) 376 if (new->thread.dabr)
377 set_dabr(new->thread.dabr); 377 set_dabr(new->thread.dabr);
@@ -514,7 +514,7 @@ void show_regs(struct pt_regs * regs)
514 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 514 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
515 trap = TRAP(regs); 515 trap = TRAP(regs);
516 if (trap == 0x300 || trap == 0x600) 516 if (trap == 0x300 || trap == 0x600)
517#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 517#ifdef CONFIG_PPC_ADV_DEBUG_REGS
518 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 518 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
519#else 519#else
520 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); 520 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
@@ -560,7 +560,7 @@ void flush_thread(void)
560 current->thread.dabr = 0; 560 current->thread.dabr = 0;
561 set_dabr(0); 561 set_dabr(0);
562 562
563#if defined(CONFIG_BOOKE) 563#ifdef CONFIG_PPC_ADV_DEBUG_REGS
564 current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W); 564 current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W);
565#endif 565#endif
566 } 566 }