diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-06-27 12:07:51 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-06-29 02:58:43 -0400 |
commit | 58083dade53cd434e134cd26ae5e89061f6de1ff (patch) | |
tree | 4a70ca228ccab50c3036a37c7d1cd4e1a2825d76 /arch/powerpc/kernel/pci_64.c | |
parent | 0b1d40c4d4dd8f276d8d9730204b3a0a17ab0d61 (diff) |
[POWERPC] Move common PCI code out of pci_32/pci_64
Moved the low hanging fruit that was either identical or close
to it between ppc32 & ppc64 for PCI into pci-common.c
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/pci_64.c')
-rw-r--r-- | arch/powerpc/kernel/pci_64.c | 309 |
1 files changed, 0 insertions, 309 deletions
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index 57bdcd88f04a..384d2752fe60 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -601,11 +601,6 @@ static int __init pcibios_init(void) | |||
601 | 601 | ||
602 | subsys_initcall(pcibios_init); | 602 | subsys_initcall(pcibios_init); |
603 | 603 | ||
604 | char __init *pcibios_setup(char *str) | ||
605 | { | ||
606 | return str; | ||
607 | } | ||
608 | |||
609 | int pcibios_enable_device(struct pci_dev *dev, int mask) | 604 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
610 | { | 605 | { |
611 | u16 cmd, oldcmd; | 606 | u16 cmd, oldcmd; |
@@ -647,211 +642,6 @@ int pci_proc_domain(struct pci_bus *bus) | |||
647 | } | 642 | } |
648 | } | 643 | } |
649 | 644 | ||
650 | /* | ||
651 | * Platform support for /proc/bus/pci/X/Y mmap()s, | ||
652 | * modelled on the sparc64 implementation by Dave Miller. | ||
653 | * -- paulus. | ||
654 | */ | ||
655 | |||
656 | /* | ||
657 | * Adjust vm_pgoff of VMA such that it is the physical page offset | ||
658 | * corresponding to the 32-bit pci bus offset for DEV requested by the user. | ||
659 | * | ||
660 | * Basically, the user finds the base address for his device which he wishes | ||
661 | * to mmap. They read the 32-bit value from the config space base register, | ||
662 | * add whatever PAGE_SIZE multiple offset they wish, and feed this into the | ||
663 | * offset parameter of mmap on /proc/bus/pci/XXX for that device. | ||
664 | * | ||
665 | * Returns negative error code on failure, zero on success. | ||
666 | */ | ||
667 | static struct resource *__pci_mmap_make_offset(struct pci_dev *dev, | ||
668 | resource_size_t *offset, | ||
669 | enum pci_mmap_state mmap_state) | ||
670 | { | ||
671 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
672 | unsigned long io_offset = 0; | ||
673 | int i, res_bit; | ||
674 | |||
675 | if (hose == 0) | ||
676 | return NULL; /* should never happen */ | ||
677 | |||
678 | /* If memory, add on the PCI bridge address offset */ | ||
679 | if (mmap_state == pci_mmap_mem) { | ||
680 | #if 0 /* See comment in pci_resource_to_user() for why this is disabled */ | ||
681 | *offset += hose->pci_mem_offset; | ||
682 | #endif | ||
683 | res_bit = IORESOURCE_MEM; | ||
684 | } else { | ||
685 | io_offset = (unsigned long)hose->io_base_virt - _IO_BASE; | ||
686 | *offset += io_offset; | ||
687 | res_bit = IORESOURCE_IO; | ||
688 | } | ||
689 | |||
690 | /* | ||
691 | * Check that the offset requested corresponds to one of the | ||
692 | * resources of the device. | ||
693 | */ | ||
694 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | ||
695 | struct resource *rp = &dev->resource[i]; | ||
696 | int flags = rp->flags; | ||
697 | |||
698 | /* treat ROM as memory (should be already) */ | ||
699 | if (i == PCI_ROM_RESOURCE) | ||
700 | flags |= IORESOURCE_MEM; | ||
701 | |||
702 | /* Active and same type? */ | ||
703 | if ((flags & res_bit) == 0) | ||
704 | continue; | ||
705 | |||
706 | /* In the range of this resource? */ | ||
707 | if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end) | ||
708 | continue; | ||
709 | |||
710 | /* found it! construct the final physical address */ | ||
711 | if (mmap_state == pci_mmap_io) | ||
712 | *offset += hose->io_base_phys - io_offset; | ||
713 | return rp; | ||
714 | } | ||
715 | |||
716 | return NULL; | ||
717 | } | ||
718 | |||
719 | /* | ||
720 | * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci | ||
721 | * device mapping. | ||
722 | */ | ||
723 | static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, | ||
724 | pgprot_t protection, | ||
725 | enum pci_mmap_state mmap_state, | ||
726 | int write_combine) | ||
727 | { | ||
728 | unsigned long prot = pgprot_val(protection); | ||
729 | |||
730 | /* Write combine is always 0 on non-memory space mappings. On | ||
731 | * memory space, if the user didn't pass 1, we check for a | ||
732 | * "prefetchable" resource. This is a bit hackish, but we use | ||
733 | * this to workaround the inability of /sysfs to provide a write | ||
734 | * combine bit | ||
735 | */ | ||
736 | if (mmap_state != pci_mmap_mem) | ||
737 | write_combine = 0; | ||
738 | else if (write_combine == 0) { | ||
739 | if (rp->flags & IORESOURCE_PREFETCH) | ||
740 | write_combine = 1; | ||
741 | } | ||
742 | |||
743 | /* XXX would be nice to have a way to ask for write-through */ | ||
744 | prot |= _PAGE_NO_CACHE; | ||
745 | if (write_combine) | ||
746 | prot &= ~_PAGE_GUARDED; | ||
747 | else | ||
748 | prot |= _PAGE_GUARDED; | ||
749 | |||
750 | return __pgprot(prot); | ||
751 | } | ||
752 | |||
753 | /* | ||
754 | * This one is used by /dev/mem and fbdev who have no clue about the | ||
755 | * PCI device, it tries to find the PCI device first and calls the | ||
756 | * above routine | ||
757 | */ | ||
758 | pgprot_t pci_phys_mem_access_prot(struct file *file, | ||
759 | unsigned long pfn, | ||
760 | unsigned long size, | ||
761 | pgprot_t protection) | ||
762 | { | ||
763 | struct pci_dev *pdev = NULL; | ||
764 | struct resource *found = NULL; | ||
765 | unsigned long prot = pgprot_val(protection); | ||
766 | unsigned long offset = pfn << PAGE_SHIFT; | ||
767 | int i; | ||
768 | |||
769 | if (page_is_ram(pfn)) | ||
770 | return __pgprot(prot); | ||
771 | |||
772 | prot |= _PAGE_NO_CACHE | _PAGE_GUARDED; | ||
773 | |||
774 | for_each_pci_dev(pdev) { | ||
775 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | ||
776 | struct resource *rp = &pdev->resource[i]; | ||
777 | int flags = rp->flags; | ||
778 | |||
779 | /* Active and same type? */ | ||
780 | if ((flags & IORESOURCE_MEM) == 0) | ||
781 | continue; | ||
782 | /* In the range of this resource? */ | ||
783 | if (offset < (rp->start & PAGE_MASK) || | ||
784 | offset > rp->end) | ||
785 | continue; | ||
786 | found = rp; | ||
787 | break; | ||
788 | } | ||
789 | if (found) | ||
790 | break; | ||
791 | } | ||
792 | if (found) { | ||
793 | if (found->flags & IORESOURCE_PREFETCH) | ||
794 | prot &= ~_PAGE_GUARDED; | ||
795 | pci_dev_put(pdev); | ||
796 | } | ||
797 | |||
798 | DBG("non-PCI map for %lx, prot: %lx\n", offset, prot); | ||
799 | |||
800 | return __pgprot(prot); | ||
801 | } | ||
802 | |||
803 | |||
804 | /* | ||
805 | * Perform the actual remap of the pages for a PCI device mapping, as | ||
806 | * appropriate for this architecture. The region in the process to map | ||
807 | * is described by vm_start and vm_end members of VMA, the base physical | ||
808 | * address is found in vm_pgoff. | ||
809 | * The pci device structure is provided so that architectures may make mapping | ||
810 | * decisions on a per-device or per-bus basis. | ||
811 | * | ||
812 | * Returns a negative error code on failure, zero on success. | ||
813 | */ | ||
814 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | ||
815 | enum pci_mmap_state mmap_state, int write_combine) | ||
816 | { | ||
817 | resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT; | ||
818 | struct resource *rp; | ||
819 | int ret; | ||
820 | |||
821 | rp = __pci_mmap_make_offset(dev, &offset, mmap_state); | ||
822 | if (rp == NULL) | ||
823 | return -EINVAL; | ||
824 | |||
825 | vma->vm_pgoff = offset >> PAGE_SHIFT; | ||
826 | vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp, | ||
827 | vma->vm_page_prot, | ||
828 | mmap_state, write_combine); | ||
829 | |||
830 | ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, | ||
831 | vma->vm_end - vma->vm_start, vma->vm_page_prot); | ||
832 | |||
833 | return ret; | ||
834 | } | ||
835 | |||
836 | static ssize_t pci_show_devspec(struct device *dev, | ||
837 | struct device_attribute *attr, char *buf) | ||
838 | { | ||
839 | struct pci_dev *pdev; | ||
840 | struct device_node *np; | ||
841 | |||
842 | pdev = to_pci_dev (dev); | ||
843 | np = pci_device_to_OF_node(pdev); | ||
844 | if (np == NULL || np->full_name == NULL) | ||
845 | return 0; | ||
846 | return sprintf(buf, "%s", np->full_name); | ||
847 | } | ||
848 | static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL); | ||
849 | |||
850 | void pcibios_add_platform_entries(struct pci_dev *pdev) | ||
851 | { | ||
852 | device_create_file(&pdev->dev, &dev_attr_devspec); | ||
853 | } | ||
854 | |||
855 | void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose, | 645 | void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose, |
856 | struct device_node *dev, int prim) | 646 | struct device_node *dev, int prim) |
857 | { | 647 | { |
@@ -1167,105 +957,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) | |||
1167 | } | 957 | } |
1168 | EXPORT_SYMBOL(pcibios_fixup_bus); | 958 | EXPORT_SYMBOL(pcibios_fixup_bus); |
1169 | 959 | ||
1170 | /* | ||
1171 | * Reads the interrupt pin to determine if interrupt is use by card. | ||
1172 | * If the interrupt is used, then gets the interrupt line from the | ||
1173 | * openfirmware and sets it in the pci_dev and pci_config line. | ||
1174 | */ | ||
1175 | int pci_read_irq_line(struct pci_dev *pci_dev) | ||
1176 | { | ||
1177 | struct of_irq oirq; | ||
1178 | unsigned int virq; | ||
1179 | |||
1180 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); | ||
1181 | |||
1182 | #ifdef DEBUG | ||
1183 | memset(&oirq, 0xff, sizeof(oirq)); | ||
1184 | #endif | ||
1185 | /* Try to get a mapping from the device-tree */ | ||
1186 | if (of_irq_map_pci(pci_dev, &oirq)) { | ||
1187 | u8 line, pin; | ||
1188 | |||
1189 | /* If that fails, lets fallback to what is in the config | ||
1190 | * space and map that through the default controller. We | ||
1191 | * also set the type to level low since that's what PCI | ||
1192 | * interrupts are. If your platform does differently, then | ||
1193 | * either provide a proper interrupt tree or don't use this | ||
1194 | * function. | ||
1195 | */ | ||
1196 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin)) | ||
1197 | return -1; | ||
1198 | if (pin == 0) | ||
1199 | return -1; | ||
1200 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) || | ||
1201 | line == 0xff) { | ||
1202 | return -1; | ||
1203 | } | ||
1204 | DBG(" -> no map ! Using irq line %d from PCI config\n", line); | ||
1205 | |||
1206 | virq = irq_create_mapping(NULL, line); | ||
1207 | if (virq != NO_IRQ) | ||
1208 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); | ||
1209 | } else { | ||
1210 | DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n", | ||
1211 | oirq.size, oirq.specifier[0], oirq.specifier[1], | ||
1212 | oirq.controller->full_name); | ||
1213 | |||
1214 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, | ||
1215 | oirq.size); | ||
1216 | } | ||
1217 | if(virq == NO_IRQ) { | ||
1218 | DBG(" -> failed to map !\n"); | ||
1219 | return -1; | ||
1220 | } | ||
1221 | |||
1222 | DBG(" -> mapped to linux irq %d\n", virq); | ||
1223 | |||
1224 | pci_dev->irq = virq; | ||
1225 | |||
1226 | return 0; | ||
1227 | } | ||
1228 | EXPORT_SYMBOL(pci_read_irq_line); | ||
1229 | |||
1230 | void pci_resource_to_user(const struct pci_dev *dev, int bar, | ||
1231 | const struct resource *rsrc, | ||
1232 | resource_size_t *start, resource_size_t *end) | ||
1233 | { | ||
1234 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
1235 | resource_size_t offset = 0; | ||
1236 | |||
1237 | if (hose == NULL) | ||
1238 | return; | ||
1239 | |||
1240 | if (rsrc->flags & IORESOURCE_IO) | ||
1241 | offset = (unsigned long)hose->io_base_virt - _IO_BASE; | ||
1242 | |||
1243 | /* We pass a fully fixed up address to userland for MMIO instead of | ||
1244 | * a BAR value because X is lame and expects to be able to use that | ||
1245 | * to pass to /dev/mem ! | ||
1246 | * | ||
1247 | * That means that we'll have potentially 64 bits values where some | ||
1248 | * userland apps only expect 32 (like X itself since it thinks only | ||
1249 | * Sparc has 64 bits MMIO) but if we don't do that, we break it on | ||
1250 | * 32 bits CHRPs :-( | ||
1251 | * | ||
1252 | * Hopefully, the sysfs insterface is immune to that gunk. Once X | ||
1253 | * has been fixed (and the fix spread enough), we can re-enable the | ||
1254 | * 2 lines below and pass down a BAR value to userland. In that case | ||
1255 | * we'll also have to re-enable the matching code in | ||
1256 | * __pci_mmap_make_offset(). | ||
1257 | * | ||
1258 | * BenH. | ||
1259 | */ | ||
1260 | #if 0 | ||
1261 | else if (rsrc->flags & IORESOURCE_MEM) | ||
1262 | offset = hose->pci_mem_offset; | ||
1263 | #endif | ||
1264 | |||
1265 | *start = rsrc->start - offset; | ||
1266 | *end = rsrc->end - offset; | ||
1267 | } | ||
1268 | |||
1269 | struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node) | 960 | struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node) |
1270 | { | 961 | { |
1271 | if (!have_of) | 962 | if (!have_of) |