aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/kernel/pci_64.c
diff options
context:
space:
mode:
authorGrant Likely <grant.likely@secretlab.ca>2009-08-28 04:58:16 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-09-02 01:45:53 -0400
commit0ed2c722c650513ba4bce868c7a052e576c060e2 (patch)
tree6b679585a9c2afa871f81dc9da90af9b79c49c02 /arch/powerpc/kernel/pci_64.c
parentc5b20d3926dfc9616265b8ff5967cb7a476f9344 (diff)
powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan()
The two versions are doing almost exactly the same thing. No need to maintain them as separate files. This patch also has the side effect of making the PCI device tree scanning code available to 32 bit powerpc machines, but no board ports actually make use of this feature at this point. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/pci_64.c')
-rw-r--r--arch/powerpc/kernel/pci_64.c46
1 files changed, 6 insertions, 40 deletions
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 4d5b4ced7e45..ba949a2c93ac 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -43,45 +43,6 @@ unsigned long pci_probe_only = 1;
43unsigned long pci_io_base = ISA_IO_BASE; 43unsigned long pci_io_base = ISA_IO_BASE;
44EXPORT_SYMBOL(pci_io_base); 44EXPORT_SYMBOL(pci_io_base);
45 45
46void __devinit scan_phb(struct pci_controller *hose)
47{
48 struct pci_bus *bus;
49 struct device_node *node = hose->dn;
50 int mode;
51
52 pr_debug("PCI: Scanning PHB %s\n",
53 node ? node->full_name : "<NO NAME>");
54
55 /* Create an empty bus for the toplevel */
56 bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, node);
57 if (bus == NULL) {
58 printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
59 hose->global_number);
60 return;
61 }
62 bus->secondary = hose->first_busno;
63 hose->bus = bus;
64
65 /* Get some IO space for the new PHB */
66 pcibios_map_io_space(bus);
67
68 /* Wire up PHB bus resources */
69 pcibios_setup_phb_resources(hose);
70
71 /* Get probe mode and perform scan */
72 mode = PCI_PROBE_NORMAL;
73 if (node && ppc_md.pci_probe_mode)
74 mode = ppc_md.pci_probe_mode(bus);
75 pr_debug(" probe mode: %d\n", mode);
76 if (mode == PCI_PROBE_DEVTREE) {
77 bus->subordinate = hose->last_busno;
78 of_scan_bus(node, bus);
79 }
80
81 if (mode == PCI_PROBE_NORMAL)
82 hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
83}
84
85static int __init pcibios_init(void) 46static int __init pcibios_init(void)
86{ 47{
87 struct pci_controller *hose, *tmp; 48 struct pci_controller *hose, *tmp;
@@ -103,7 +64,7 @@ static int __init pcibios_init(void)
103 64
104 /* Scan all of the recorded PCI controllers. */ 65 /* Scan all of the recorded PCI controllers. */
105 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 66 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
106 scan_phb(hose); 67 pcibios_scan_phb(hose, hose->dn);
107 pci_bus_add_devices(hose->bus); 68 pci_bus_add_devices(hose->bus);
108 } 69 }
109 70
@@ -237,6 +198,11 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
237} 198}
238EXPORT_SYMBOL_GPL(pcibios_map_io_space); 199EXPORT_SYMBOL_GPL(pcibios_map_io_space);
239 200
201void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
202{
203 pcibios_map_io_space(hose->bus);
204}
205
240#define IOBASE_BRIDGE_NUMBER 0 206#define IOBASE_BRIDGE_NUMBER 0
241#define IOBASE_MEMORY 1 207#define IOBASE_MEMORY 1
242#define IOBASE_IO 2 208#define IOBASE_IO 2