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authorGrant Likely <grant.likely@secretlab.ca>2009-08-25 16:07:11 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-08-28 00:24:15 -0400
commitfbe65447197789a3ccccc27755956f6a4c445089 (patch)
tree58d0f0a97883bb573b5eae2a0e35618cc8b83062 /arch/powerpc/kernel/pci_64.c
parentae14e13a4c8bb091dfd5606fd76c9cd272090ab7 (diff)
powerpc/pci: move pci_64.c device tree scanning code into pci-common.c
The PCI device tree scanning code in pci_64.c is some useful functionality. It allows PCI devices to be described in the device tree instead of being probed for, which in turn allows pci devices to use all of the device tree facilities to describe complex PCI bus architectures like GPIO and IRQ routing (perhaps not a common situation for desktop or server systems, but useful for embedded systems with on-board PCI devices). This patch moves the device tree scanning into pci-common.c so it is available for 32-bit powerpc machines too. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/pci_64.c')
-rw-r--r--arch/powerpc/kernel/pci_64.c289
1 files changed, 0 insertions, 289 deletions
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 9e8902fa14c7..4d5b4ced7e45 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -43,295 +43,6 @@ unsigned long pci_probe_only = 1;
43unsigned long pci_io_base = ISA_IO_BASE; 43unsigned long pci_io_base = ISA_IO_BASE;
44EXPORT_SYMBOL(pci_io_base); 44EXPORT_SYMBOL(pci_io_base);
45 45
46static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
47{
48 const u32 *prop;
49 int len;
50
51 prop = of_get_property(np, name, &len);
52 if (prop && len >= 4)
53 return *prop;
54 return def;
55}
56
57static unsigned int pci_parse_of_flags(u32 addr0, int bridge)
58{
59 unsigned int flags = 0;
60
61 if (addr0 & 0x02000000) {
62 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
63 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
64 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
65 if (addr0 & 0x40000000)
66 flags |= IORESOURCE_PREFETCH
67 | PCI_BASE_ADDRESS_MEM_PREFETCH;
68 /* Note: We don't know whether the ROM has been left enabled
69 * by the firmware or not. We mark it as disabled (ie, we do
70 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
71 * do a config space read, it will be force-enabled if needed
72 */
73 if (!bridge && (addr0 & 0xff) == 0x30)
74 flags |= IORESOURCE_READONLY;
75 } else if (addr0 & 0x01000000)
76 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
77 if (flags)
78 flags |= IORESOURCE_SIZEALIGN;
79 return flags;
80}
81
82
83static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev)
84{
85 u64 base, size;
86 unsigned int flags;
87 struct resource *res;
88 const u32 *addrs;
89 u32 i;
90 int proplen;
91
92 addrs = of_get_property(node, "assigned-addresses", &proplen);
93 if (!addrs)
94 return;
95 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
96 for (; proplen >= 20; proplen -= 20, addrs += 5) {
97 flags = pci_parse_of_flags(addrs[0], 0);
98 if (!flags)
99 continue;
100 base = of_read_number(&addrs[1], 2);
101 size = of_read_number(&addrs[3], 2);
102 if (!size)
103 continue;
104 i = addrs[0] & 0xff;
105 pr_debug(" base: %llx, size: %llx, i: %x\n",
106 (unsigned long long)base,
107 (unsigned long long)size, i);
108
109 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
110 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
111 } else if (i == dev->rom_base_reg) {
112 res = &dev->resource[PCI_ROM_RESOURCE];
113 flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
114 } else {
115 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
116 continue;
117 }
118 res->start = base;
119 res->end = base + size - 1;
120 res->flags = flags;
121 res->name = pci_name(dev);
122 }
123}
124
125struct pci_dev *of_create_pci_dev(struct device_node *node,
126 struct pci_bus *bus, int devfn)
127{
128 struct pci_dev *dev;
129 const char *type;
130
131 dev = alloc_pci_dev();
132 if (!dev)
133 return NULL;
134 type = of_get_property(node, "device_type", NULL);
135 if (type == NULL)
136 type = "";
137
138 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
139
140 dev->bus = bus;
141 dev->sysdata = node;
142 dev->dev.parent = bus->bridge;
143 dev->dev.bus = &pci_bus_type;
144 dev->devfn = devfn;
145 dev->multifunction = 0; /* maybe a lie? */
146
147 dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
148 dev->device = get_int_prop(node, "device-id", 0xffff);
149 dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
150 dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
151
152 dev->cfg_size = pci_cfg_space_size(dev);
153
154 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
155 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
156 dev->class = get_int_prop(node, "class-code", 0);
157 dev->revision = get_int_prop(node, "revision-id", 0);
158
159 pr_debug(" class: 0x%x\n", dev->class);
160 pr_debug(" revision: 0x%x\n", dev->revision);
161
162 dev->current_state = 4; /* unknown power state */
163 dev->error_state = pci_channel_io_normal;
164 dev->dma_mask = 0xffffffff;
165
166 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
167 /* a PCI-PCI bridge */
168 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
169 dev->rom_base_reg = PCI_ROM_ADDRESS1;
170 } else if (!strcmp(type, "cardbus")) {
171 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
172 } else {
173 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
174 dev->rom_base_reg = PCI_ROM_ADDRESS;
175 /* Maybe do a default OF mapping here */
176 dev->irq = NO_IRQ;
177 }
178
179 pci_parse_of_addrs(node, dev);
180
181 pr_debug(" adding to system ...\n");
182
183 pci_device_add(dev, bus);
184
185 return dev;
186}
187EXPORT_SYMBOL(of_create_pci_dev);
188
189static void __devinit __of_scan_bus(struct device_node *node,
190 struct pci_bus *bus, int rescan_existing)
191{
192 struct device_node *child;
193 const u32 *reg;
194 int reglen, devfn;
195 struct pci_dev *dev;
196
197 pr_debug("of_scan_bus(%s) bus no %d... \n",
198 node->full_name, bus->number);
199
200 /* Scan direct children */
201 for_each_child_of_node(node, child) {
202 pr_debug(" * %s\n", child->full_name);
203 reg = of_get_property(child, "reg", &reglen);
204 if (reg == NULL || reglen < 20)
205 continue;
206 devfn = (reg[0] >> 8) & 0xff;
207
208 /* create a new pci_dev for this device */
209 dev = of_create_pci_dev(child, bus, devfn);
210 if (!dev)
211 continue;
212 pr_debug(" dev header type: %x\n", dev->hdr_type);
213 }
214
215 /* Apply all fixups necessary. We don't fixup the bus "self"
216 * for an existing bridge that is being rescanned
217 */
218 if (!rescan_existing)
219 pcibios_setup_bus_self(bus);
220 pcibios_setup_bus_devices(bus);
221
222 /* Now scan child busses */
223 list_for_each_entry(dev, &bus->devices, bus_list) {
224 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
225 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
226 struct device_node *child = pci_device_to_OF_node(dev);
227 if (dev)
228 of_scan_pci_bridge(child, dev);
229 }
230 }
231}
232
233void __devinit of_scan_bus(struct device_node *node,
234 struct pci_bus *bus)
235{
236 __of_scan_bus(node, bus, 0);
237}
238EXPORT_SYMBOL_GPL(of_scan_bus);
239
240void __devinit of_rescan_bus(struct device_node *node,
241 struct pci_bus *bus)
242{
243 __of_scan_bus(node, bus, 1);
244}
245EXPORT_SYMBOL_GPL(of_rescan_bus);
246
247void __devinit of_scan_pci_bridge(struct device_node *node,
248 struct pci_dev *dev)
249{
250 struct pci_bus *bus;
251 const u32 *busrange, *ranges;
252 int len, i, mode;
253 struct resource *res;
254 unsigned int flags;
255 u64 size;
256
257 pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
258
259 /* parse bus-range property */
260 busrange = of_get_property(node, "bus-range", &len);
261 if (busrange == NULL || len != 8) {
262 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
263 node->full_name);
264 return;
265 }
266 ranges = of_get_property(node, "ranges", &len);
267 if (ranges == NULL) {
268 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
269 node->full_name);
270 return;
271 }
272
273 bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
274 if (!bus) {
275 printk(KERN_ERR "Failed to create pci bus for %s\n",
276 node->full_name);
277 return;
278 }
279
280 bus->primary = dev->bus->number;
281 bus->subordinate = busrange[1];
282 bus->bridge_ctl = 0;
283 bus->sysdata = node;
284
285 /* parse ranges property */
286 /* PCI #address-cells == 3 and #size-cells == 2 always */
287 res = &dev->resource[PCI_BRIDGE_RESOURCES];
288 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
289 res->flags = 0;
290 bus->resource[i] = res;
291 ++res;
292 }
293 i = 1;
294 for (; len >= 32; len -= 32, ranges += 8) {
295 flags = pci_parse_of_flags(ranges[0], 1);
296 size = of_read_number(&ranges[6], 2);
297 if (flags == 0 || size == 0)
298 continue;
299 if (flags & IORESOURCE_IO) {
300 res = bus->resource[0];
301 if (res->flags) {
302 printk(KERN_ERR "PCI: ignoring extra I/O range"
303 " for bridge %s\n", node->full_name);
304 continue;
305 }
306 } else {
307 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
308 printk(KERN_ERR "PCI: too many memory ranges"
309 " for bridge %s\n", node->full_name);
310 continue;
311 }
312 res = bus->resource[i];
313 ++i;
314 }
315 res->start = of_read_number(&ranges[1], 2);
316 res->end = res->start + size - 1;
317 res->flags = flags;
318 }
319 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
320 bus->number);
321 pr_debug(" bus name: %s\n", bus->name);
322
323 mode = PCI_PROBE_NORMAL;
324 if (ppc_md.pci_probe_mode)
325 mode = ppc_md.pci_probe_mode(bus);
326 pr_debug(" probe mode: %d\n", mode);
327
328 if (mode == PCI_PROBE_DEVTREE)
329 of_scan_bus(node, bus);
330 else if (mode == PCI_PROBE_NORMAL)
331 pci_scan_child_bus(bus);
332}
333EXPORT_SYMBOL(of_scan_pci_bridge);
334
335void __devinit scan_phb(struct pci_controller *hose) 46void __devinit scan_phb(struct pci_controller *hose)
336{ 47{
337 struct pci_bus *bus; 48 struct pci_bus *bus;
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